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authorakpm@osdl.org <akpm@osdl.org>2006-01-12 04:05:30 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-12 12:08:50 -0500
commit198e2f181163233b379dc7ce8a6d7516b84042e7 (patch)
treecc4067ca1c81034ba8d214b7ff4c39f2f5be66ee /Documentation
parent4dc7a0bbeb6882ad665e588e82fabe5bb4645f2f (diff)
[PATCH] scheduler cache-hot-autodetect
) From: Ingo Molnar <mingo@elte.hu> This is the latest version of the scheduler cache-hot-auto-tune patch. The first problem was that detection time scaled with O(N^2), which is unacceptable on larger SMP and NUMA systems. To solve this: - I've added a 'domain distance' function, which is used to cache measurement results. Each distance is only measured once. This means that e.g. on NUMA distances of 0, 1 and 2 might be measured, on HT distances 0 and 1, and on SMP distance 0 is measured. The code walks the domain tree to determine the distance, so it automatically follows whatever hierarchy an architecture sets up. This cuts down on the boot time significantly and removes the O(N^2) limit. The only assumption is that migration costs can be expressed as a function of domain distance - this covers the overwhelming majority of existing systems, and is a good guess even for more assymetric systems. [ People hacking systems that have assymetries that break this assumption (e.g. different CPU speeds) should experiment a bit with the cpu_distance() function. Adding a ->migration_distance factor to the domain structure would be one possible solution - but lets first see the problem systems, if they exist at all. Lets not overdesign. ] Another problem was that only a single cache-size was used for measuring the cost of migration, and most architectures didnt set that variable up. Furthermore, a single cache-size does not fit NUMA hierarchies with L3 caches and does not fit HT setups, where different CPUs will often have different 'effective cache sizes'. To solve this problem: - Instead of relying on a single cache-size provided by the platform and sticking to it, the code now auto-detects the 'effective migration cost' between two measured CPUs, via iterating through a wide range of cachesizes. The code searches for the maximum migration cost, which occurs when the working set of the test-workload falls just below the 'effective cache size'. I.e. real-life optimized search is done for the maximum migration cost, between two real CPUs. This, amongst other things, has the positive effect hat if e.g. two CPUs share a L2/L3 cache, a different (and accurate) migration cost will be found than between two CPUs on the same system that dont share any caches. (The reliable measurement of migration costs is tricky - see the source for details.) Furthermore i've added various boot-time options to override/tune migration behavior. Firstly, there's a blanket override for autodetection: migration_cost=1000,2000,3000 will override the depth 0/1/2 values with 1msec/2msec/3msec values. Secondly, there's a global factor that can be used to increase (or decrease) the autodetected values: migration_factor=120 will increase the autodetected values by 20%. This option is useful to tune things in a workload-dependent way - e.g. if a workload is cache-insensitive then CPU utilization can be maximized by specifying migration_factor=0. I've tested the autodetection code quite extensively on x86, on 3 P3/Xeon/2MB, and the autodetected values look pretty good: Dual Celeron (128K L2 cache): --------------------- migration cost matrix (max_cache_size: 131072, cpu: 467 MHz): --------------------- [00] [01] [00]: - 1.7(1) [01]: 1.7(1) - --------------------- cacheflush times [2]: 0.0 (0) 1.7 (1784008) --------------------- Here the slow memory subsystem dominates system performance, and even though caches are small, the migration cost is 1.7 msecs. Dual HT P4 (512K L2 cache): --------------------- migration cost matrix (max_cache_size: 524288, cpu: 2379 MHz): --------------------- [00] [01] [02] [03] [00]: - 0.4(1) 0.0(0) 0.4(1) [01]: 0.4(1) - 0.4(1) 0.0(0) [02]: 0.0(0) 0.4(1) - 0.4(1) [03]: 0.4(1) 0.0(0) 0.4(1) - --------------------- cacheflush times [2]: 0.0 (33900) 0.4 (448514) --------------------- Here it can be seen that there is no migration cost between two HT siblings (CPU#0/2 and CPU#1/3 are separate physical CPUs). A fast memory system makes inter-physical-CPU migration pretty cheap: 0.4 msecs. 8-way P3/Xeon [2MB L2 cache]: --------------------- migration cost matrix (max_cache_size: 2097152, cpu: 700 MHz): --------------------- [00] [01] [02] [03] [04] [05] [06] [07] [00]: - 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) [01]: 19.2(1) - 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) [02]: 19.2(1) 19.2(1) - 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) [03]: 19.2(1) 19.2(1) 19.2(1) - 19.2(1) 19.2(1) 19.2(1) 19.2(1) [04]: 19.2(1) 19.2(1) 19.2(1) 19.2(1) - 19.2(1) 19.2(1) 19.2(1) [05]: 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) - 19.2(1) 19.2(1) [06]: 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) - 19.2(1) [07]: 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) 19.2(1) - --------------------- cacheflush times [2]: 0.0 (0) 19.2 (19281756) --------------------- This one has huge caches and a relatively slow memory subsystem - so the migration cost is 19 msecs. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Cc: <wilder@us.ibm.com> Signed-off-by: John Hawkes <hawkes@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/kernel-parameters.txt43
1 files changed, 43 insertions, 0 deletions
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index dd0bfc291a68..fe11fccf7e41 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -856,6 +856,49 @@ running once the system is up.
856 856
857 mga= [HW,DRM] 857 mga= [HW,DRM]
858 858
859 migration_cost=
860 [KNL,SMP] debug: override scheduler migration costs
861 Format: <level-1-usecs>,<level-2-usecs>,...
862 This debugging option can be used to override the
863 default scheduler migration cost matrix. The numbers
864 are indexed by 'CPU domain distance'.
865 E.g. migration_cost=1000,2000,3000 on an SMT NUMA
866 box will set up an intra-core migration cost of
867 1 msec, an inter-core migration cost of 2 msecs,
868 and an inter-node migration cost of 3 msecs.
869
870 WARNING: using the wrong values here can break
871 scheduler performance, so it's only for scheduler
872 development purposes, not production environments.
873
874 migration_debug=
875 [KNL,SMP] migration cost auto-detect verbosity
876 Format=<0|1|2>
877 If a system's migration matrix reported at bootup
878 seems erroneous then this option can be used to
879 increase verbosity of the detection process.
880 We default to 0 (no extra messages), 1 will print
881 some more information, and 2 will be really
882 verbose (probably only useful if you also have a
883 serial console attached to the system).
884
885 migration_factor=
886 [KNL,SMP] multiply/divide migration costs by a factor
887 Format=<percent>
888 This debug option can be used to proportionally
889 increase or decrease the auto-detected migration
890 costs for all entries of the migration matrix.
891 E.g. migration_factor=150 will increase migration
892 costs by 50%. (and thus the scheduler will be less
893 eager migrating cache-hot tasks)
894 migration_factor=80 will decrease migration costs
895 by 20%. (thus the scheduler will be more eager to
896 migrate tasks)
897
898 WARNING: using the wrong values here can break
899 scheduler performance, so it's only for scheduler
900 development purposes, not production environments.
901
859 mousedev.tap_time= 902 mousedev.tap_time=
860 [MOUSE] Maximum time between finger touching and 903 [MOUSE] Maximum time between finger touching and
861 leaving touchpad surface for touch to be considered 904 leaving touchpad surface for touch to be considered