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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-03 12:44:08 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-03 12:44:08 -0400
commita54dfb1a845c38a97686268d8c4086a63d9493aa (patch)
tree3b31c81672fa89102aae929cc6c1e48e6e9382f4 /Documentation
parenteb0ad9c06d51edb5d18a7007fd4d77a8805b2ba7 (diff)
parent36165f55055781a0e4bf32d775241796414504b0 (diff)
Merge tag 'dt-for-3.7' of git://sources.calxeda.com/kernel/linux
Pull devicetree updates from Rob Herring: - Import of latest upstream device tree compiler (dtc) - New function of_get_child_by_name - Support for #size-cells of 0 and #addr-cells of >2 - Couple of DT binding documentation updates Fix up trivial conflicts due to of_get_child_by_name() having been added next to the new of_get_next_available_child(). * tag 'dt-for-3.7' of git://sources.calxeda.com/kernel/linux: MAINTAINERS: add scripts/dtc under Devicetree maintainers dtc: import latest upstream dtc dt: Document general interrupt controller bindings dt/s3c64xx/spi: Use of_get_child_by_name to get a named child dt: introduce of_get_child_by_name to get child node by name of: i2c: add support for wakeup-source property of/address: Handle #address-cells > 2 specially DT: export of_irq_to_resource_table() devicetree: serial: Add documentation for imx serial devicetree: pwm: mxs-pwm.txt: Fix reg field annotation of: Allow busses with #size-cells=0
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/interrupts.txt95
-rw-r--r--Documentation/devicetree/bindings/pwm/mxs-pwm.txt2
-rw-r--r--Documentation/devicetree/bindings/serial/fsl-imx-uart.txt35
3 files changed, 131 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
new file mode 100644
index 000000000000..72a06c0ab1db
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
@@ -0,0 +1,95 @@
1Specifying interrupt information for devices
2============================================
3
41) Interrupt client nodes
5-------------------------
6
7Nodes that describe devices which generate interrupts must contain an
8"interrupts" property. This property must contain a list of interrupt
9specifiers, one per output interrupt. The format of the interrupt specifier is
10determined by the interrupt controller to which the interrupts are routed; see
11section 2 below for details.
12
13The "interrupt-parent" property is used to specify the controller to which
14interrupts are routed and contains a single phandle referring to the interrupt
15controller node. This property is inherited, so it may be specified in an
16interrupt client node or in any of its parent nodes.
17
182) Interrupt controller nodes
19-----------------------------
20
21A device is marked as an interrupt controller with the "interrupt-controller"
22property. This is a empty, boolean property. An additional "#interrupt-cells"
23property defines the number of cells needed to specify a single interrupt.
24
25It is the responsibility of the interrupt controller's binding to define the
26length and format of the interrupt specifier. The following two variants are
27commonly used:
28
29 a) one cell
30 -----------
31 The #interrupt-cells property is set to 1 and the single cell defines the
32 index of the interrupt within the controller.
33
34 Example:
35
36 vic: intc@10140000 {
37 compatible = "arm,versatile-vic";
38 interrupt-controller;
39 #interrupt-cells = <1>;
40 reg = <0x10140000 0x1000>;
41 };
42
43 sic: intc@10003000 {
44 compatible = "arm,versatile-sic";
45 interrupt-controller;
46 #interrupt-cells = <1>;
47 reg = <0x10003000 0x1000>;
48 interrupt-parent = <&vic>;
49 interrupts = <31>; /* Cascaded to vic */
50 };
51
52 b) two cells
53 ------------
54 The #interrupt-cells property is set to 2 and the first cell defines the
55 index of the interrupt within the controller, while the second cell is used
56 to specify any of the following flags:
57 - bits[3:0] trigger type and level flags
58 1 = low-to-high edge triggered
59 2 = high-to-low edge triggered
60 4 = active high level-sensitive
61 8 = active low level-sensitive
62
63 Example:
64
65 i2c@7000c000 {
66 gpioext: gpio-adnp@41 {
67 compatible = "ad,gpio-adnp";
68 reg = <0x41>;
69
70 interrupt-parent = <&gpio>;
71 interrupts = <160 1>;
72
73 gpio-controller;
74 #gpio-cells = <1>;
75
76 interrupt-controller;
77 #interrupt-cells = <2>;
78
79 nr-gpios = <64>;
80 };
81
82 sx8634@2b {
83 compatible = "smtc,sx8634";
84 reg = <0x2b>;
85
86 interrupt-parent = <&gpioext>;
87 interrupts = <3 0x8>;
88
89 #address-cells = <1>;
90 #size-cells = <0>;
91
92 threshold = <0x40>;
93 sensitivity = <7>;
94 };
95 };
diff --git a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt
index b16f4a57d111..11963e4d6bc4 100644
--- a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt
@@ -11,7 +11,7 @@ Example:
11 11
12pwm: pwm@80064000 { 12pwm: pwm@80064000 {
13 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; 13 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
14 reg = <0x80064000 2000>; 14 reg = <0x80064000 0x2000>;
15 #pwm-cells = <2>; 15 #pwm-cells = <2>;
16 fsl,pwm-number = <8>; 16 fsl,pwm-number = <8>;
17}; 17};
diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
new file mode 100644
index 000000000000..c58573b5b1a4
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
@@ -0,0 +1,35 @@
1* Freescale i.MX UART controller
2
3Required properties:
4- compatible : should be "fsl,imx21-uart"
5- reg : Address and length of the register set for the device
6- interrupts : Should contain UART interrupt number
7
8Optional properties:
9- fsl,uart-has-rtscts: indicate that RTS/CTS signals are used
10
11Note: Each uart controller should have an alias correctly numbered
12in "aliases" node.
13
14Example:
15
16- From imx51.dtsi:
17aliases {
18 serial0 = &uart1;
19 serial1 = &uart2;
20 serial2 = &uart3;
21};
22
23uart1: serial@73fbc000 {
24 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
25 reg = <0x73fbc000 0x4000>;
26 interrupts = <31>;
27 status = "disabled";
28}
29
30- From imx51-babbage.dts:
31uart1: serial@73fbc000 {
32 fsl,uart-has-rtscts;
33 status = "okay";
34};
35