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author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-04-09 11:39:39 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-04-09 11:39:39 -0400 |
commit | 97e18dc007546fce8e99098480b921a02ebb3037 (patch) | |
tree | f38c022d034e0172e83f6972983577f790f24dac /Documentation | |
parent | 042f7b7cbd1e531278a09c449563165ba1f07673 (diff) | |
parent | c67480173f72e883235dd0ad09d90156c8f87600 (diff) |
Merge tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc
Pull MMC updates from Chris Ball:
"MMC highlights for 3.15:
Core:
- CONFIG_MMC_UNSAFE_RESUME=y is now default behavior
- DT bindings for SDHCI UHS, eMMC HS200, high-speed DDR, at 1.8/1.2V
- Add GPIO descriptor based slot-gpio card detect API
Drivers:
- dw_mmc: Refactor SOCFPGA support as a variant inside dw_mmc-pltfm.c
- mmci: Support HW busy detection on ux500
- omap: Support MMC_ERASE
- omap_hsmmc: Support MMC_PM_KEEP_POWER, MMC_PM_WAKE_SDIO_IRQ, (a)cmd23
- rtsx: Support pre-req/post-req async
- sdhci: Add support for Realtek RTS5250 controllers
- sdhci-acpi: Add support for 80860F16, fix 80860F14/SDIO card detect
- sdhci-msm: Add new driver for Qualcomm SDHCI chipset support
- sdhci-pxav3: Add support for Marvell Armada 380 and 385 SoCs"
* tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (102 commits)
mmc: sdhci-acpi: Intel SDIO has broken card detect
mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller
mmc: sdhci-msm: Add platform_execute_tuning implementation
mmc: sdhci-msm: Initial support for Qualcomm chipsets
mmc: sdhci-msm: Qualcomm SDHCI binding documentation
sdhci: only reprogram retuning timer when flag is set
mmc: rename ARCH_BCM to ARCH_BCM_MOBILE
mmc: sdhci: Allow for irq being shared
mmc: sdhci-acpi: Add device id 80860F16
mmc: sdhci-acpi: Fix broken card detect for ACPI HID 80860F14
mmc: slot-gpio: Add GPIO descriptor based CD GPIO API
mmc: slot-gpio: Split out CD IRQ request into a separate function
mmc: slot-gpio: Record GPIO descriptors instead of GPIO numbers
Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform"
mmc: sdhci-spear: use generic card detection gpio support
mmc: sdhci-spear: remove support for power gpio
mmc: sdhci-spear: simplify resource handling
mmc: sdhci-spear: fix platform_data usage
mmc: sdhci-spear: fix error handling paths for DT
mmc: sdhci-bcm-kona: fix build errors when built-in
...
Diffstat (limited to 'Documentation')
5 files changed, 108 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt index 458b57f199af..9dce540771fb 100644 --- a/Documentation/devicetree/bindings/mmc/mmc.txt +++ b/Documentation/devicetree/bindings/mmc/mmc.txt | |||
@@ -26,9 +26,18 @@ Optional properties: | |||
26 | this system, even if the controller claims it is. | 26 | this system, even if the controller claims it is. |
27 | - cap-sd-highspeed: SD high-speed timing is supported | 27 | - cap-sd-highspeed: SD high-speed timing is supported |
28 | - cap-mmc-highspeed: MMC high-speed timing is supported | 28 | - cap-mmc-highspeed: MMC high-speed timing is supported |
29 | - sd-uhs-sdr12: SD UHS SDR12 speed is supported | ||
30 | - sd-uhs-sdr25: SD UHS SDR25 speed is supported | ||
31 | - sd-uhs-sdr50: SD UHS SDR50 speed is supported | ||
32 | - sd-uhs-sdr104: SD UHS SDR104 speed is supported | ||
33 | - sd-uhs-ddr50: SD UHS DDR50 speed is supported | ||
29 | - cap-power-off-card: powering off the card is safe | 34 | - cap-power-off-card: powering off the card is safe |
30 | - cap-sdio-irq: enable SDIO IRQ signalling on this interface | 35 | - cap-sdio-irq: enable SDIO IRQ signalling on this interface |
31 | - full-pwr-cycle: full power cycle of the card is supported | 36 | - full-pwr-cycle: full power cycle of the card is supported |
37 | - mmc-highspeed-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported | ||
38 | - mmc-highspeed-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported | ||
39 | - mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported | ||
40 | - mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported | ||
32 | 41 | ||
33 | *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line | 42 | *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line |
34 | polarity properties, we have to fix the meaning of the "normal" and "inverted" | 43 | polarity properties, we have to fix the meaning of the "normal" and "inverted" |
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt new file mode 100644 index 000000000000..81b33b5b20fc --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt | |||
@@ -0,0 +1,55 @@ | |||
1 | * Qualcomm SDHCI controller (sdhci-msm) | ||
2 | |||
3 | This file documents differences between the core properties in mmc.txt | ||
4 | and the properties used by the sdhci-msm driver. | ||
5 | |||
6 | Required properties: | ||
7 | - compatible: Should contain "qcom,sdhci-msm-v4". | ||
8 | - reg: Base address and length of the register in the following order: | ||
9 | - Host controller register map (required) | ||
10 | - SD Core register map (required) | ||
11 | - interrupts: Should contain an interrupt-specifiers for the interrupts: | ||
12 | - Host controller interrupt (required) | ||
13 | - pinctrl-names: Should contain only one value - "default". | ||
14 | - pinctrl-0: Should specify pin control groups used for this controller. | ||
15 | - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names. | ||
16 | - clock-names: Should contain the following: | ||
17 | "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required) | ||
18 | "core" - SDC MMC clock (MCLK) (required) | ||
19 | "bus" - SDCC bus voter clock (optional) | ||
20 | |||
21 | Example: | ||
22 | |||
23 | sdhc_1: sdhci@f9824900 { | ||
24 | compatible = "qcom,sdhci-msm-v4"; | ||
25 | reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; | ||
26 | interrupts = <0 123 0>; | ||
27 | bus-width = <8>; | ||
28 | non-removable; | ||
29 | |||
30 | vmmc = <&pm8941_l20>; | ||
31 | vqmmc = <&pm8941_s3>; | ||
32 | |||
33 | pinctrl-names = "default"; | ||
34 | pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>; | ||
35 | |||
36 | clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; | ||
37 | clock-names = "core", "iface"; | ||
38 | }; | ||
39 | |||
40 | sdhc_2: sdhci@f98a4900 { | ||
41 | compatible = "qcom,sdhci-msm-v4"; | ||
42 | reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; | ||
43 | interrupts = <0 125 0>; | ||
44 | bus-width = <4>; | ||
45 | cd-gpios = <&msmgpio 62 0x1>; | ||
46 | |||
47 | vmmc = <&pm8941_l21>; | ||
48 | vqmmc = <&pm8941_l13>; | ||
49 | |||
50 | pinctrl-names = "default"; | ||
51 | pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>; | ||
52 | |||
53 | clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; | ||
54 | clock-names = "core", "iface"; | ||
55 | }; | ||
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt index dbe98a3c183a..86223c3eda90 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt | |||
@@ -4,7 +4,14 @@ This file documents differences between the core properties in mmc.txt | |||
4 | and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers. | 4 | and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers. |
5 | 5 | ||
6 | Required properties: | 6 | Required properties: |
7 | - compatible: Should be "mrvl,pxav2-mmc" or "mrvl,pxav3-mmc". | 7 | - compatible: Should be "mrvl,pxav2-mmc", "mrvl,pxav3-mmc" or |
8 | "marvell,armada-380-sdhci". | ||
9 | - reg: | ||
10 | * for "mrvl,pxav2-mmc" and "mrvl,pxav3-mmc", one register area for | ||
11 | the SDHCI registers. | ||
12 | * for "marvell,armada-380-sdhci", two register areas. The first one | ||
13 | for the SDHCI registers themselves, and the second one for the | ||
14 | AXI/Mbus bridge registers of the SDHCI unit. | ||
8 | 15 | ||
9 | Optional properties: | 16 | Optional properties: |
10 | - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning. | 17 | - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning. |
@@ -19,3 +26,11 @@ sdhci@d4280800 { | |||
19 | non-removable; | 26 | non-removable; |
20 | mrvl,clk-delay-cycles = <31>; | 27 | mrvl,clk-delay-cycles = <31>; |
21 | }; | 28 | }; |
29 | |||
30 | sdhci@d8000 { | ||
31 | compatible = "marvell,armada-380-sdhci"; | ||
32 | reg = <0xd8000 0x1000>, <0xdc000 0x100>; | ||
33 | interrupts = <0 25 0x4>; | ||
34 | clocks = <&gateclk 17>; | ||
35 | mrvl,clk-delay-cycles = <0x1F>; | ||
36 | }; | ||
diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt index 8c8908ab84ba..ce8056116fb0 100644 --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt | |||
@@ -10,6 +10,7 @@ Required properties: | |||
10 | - compatible: | 10 | - compatible: |
11 | Should be "ti,omap2-hsmmc", for OMAP2 controllers | 11 | Should be "ti,omap2-hsmmc", for OMAP2 controllers |
12 | Should be "ti,omap3-hsmmc", for OMAP3 controllers | 12 | Should be "ti,omap3-hsmmc", for OMAP3 controllers |
13 | Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0 | ||
13 | Should be "ti,omap4-hsmmc", for OMAP4 controllers | 14 | Should be "ti,omap4-hsmmc", for OMAP4 controllers |
14 | - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1 | 15 | - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1 |
15 | 16 | ||
diff --git a/Documentation/devicetree/bindings/regulator/pbias-regulator.txt b/Documentation/devicetree/bindings/regulator/pbias-regulator.txt new file mode 100644 index 000000000000..32aa26f1e434 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/pbias-regulator.txt | |||
@@ -0,0 +1,27 @@ | |||
1 | PBIAS internal regulator for SD card dual voltage i/o pads on OMAP SoCs. | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: | ||
5 | - "ti,pbias-omap" for OMAP2, OMAP3, OMAP4, OMAP5, DRA7. | ||
6 | - reg: pbias register offset from syscon base and size of pbias register. | ||
7 | - syscon : phandle of the system control module | ||
8 | - regulator-name : should be | ||
9 | pbias_mmc_omap2430 for OMAP2430, OMAP3 SoCs | ||
10 | pbias_sim_omap3 for OMAP3 SoCs | ||
11 | pbias_mmc_omap4 for OMAP4 SoCs | ||
12 | pbias_mmc_omap5 for OMAP5 and DRA7 SoC | ||
13 | |||
14 | Optional properties: | ||
15 | - Any optional property defined in bindings/regulator/regulator.txt | ||
16 | |||
17 | Example: | ||
18 | |||
19 | pbias_regulator: pbias_regulator { | ||
20 | compatible = "ti,pbias-omap"; | ||
21 | reg = <0 0x4>; | ||
22 | syscon = <&omap5_padconf_global>; | ||
23 | pbias_mmc_reg: pbias_mmc_omap5 { | ||
24 | regulator-name = "pbias_mmc_omap5"; | ||
25 | regulator-min-microvolt = <1800000>; | ||
26 | regulator-max-microvolt = <3000000>; | ||
27 | }; | ||