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author | Chanwoo Choi <cw00.choi@samsung.com> | 2015-02-02 19:13:54 -0500 |
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committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-02-05 13:31:06 -0500 |
commit | 8e46c4b84faf317773d5a4ec6d807ceae2d0eb41 (patch) | |
tree | cdb7af210fdb36a90034e3b48f8dc1629d2e1ecf /Documentation | |
parent | 45e58aa5f751fd861d46f7b6d438c1be147458c6 (diff) |
clk: samsung: exynos5433: Add clocks for CMU_ISP domain
This patch adds the mux/divider/gate clocks for CMU_ISP domain which
generates the clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index acc1d8aac95c..4f3bfcd366a3 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt | |||
@@ -43,6 +43,8 @@ Required Properties: | |||
43 | which generates clocks for MFC(Multi-Format Codec) IP. | 43 | which generates clocks for MFC(Multi-Format Codec) IP. |
44 | - "samsung,exynos5433-cmu-hevc" - clock controller compatible for CMU_HEVC | 44 | - "samsung,exynos5433-cmu-hevc" - clock controller compatible for CMU_HEVC |
45 | which generates clocks for HEVC(High Efficiency Video Codec) decoder IP. | 45 | which generates clocks for HEVC(High Efficiency Video Codec) decoder IP. |
46 | - "samsung,exynos5433-cmu-isp" - clock controller compatible for CMU_ISP | ||
47 | which generates clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs. | ||
46 | 48 | ||
47 | - reg: physical base address of the controller and length of memory mapped | 49 | - reg: physical base address of the controller and length of memory mapped |
48 | region. | 50 | region. |
@@ -137,6 +139,11 @@ Required Properties: | |||
137 | - oscclk | 139 | - oscclk |
138 | - aclk_hevc_400 | 140 | - aclk_hevc_400 |
139 | 141 | ||
142 | Input clocks for isp clock controller: | ||
143 | - oscclk | ||
144 | - aclk_isp_dis_400 | ||
145 | - aclk_isp_400 | ||
146 | |||
140 | Each clock is assigned an identifier and client nodes can use this identifier | 147 | Each clock is assigned an identifier and client nodes can use this identifier |
141 | to specify the clock which they consume. | 148 | to specify the clock which they consume. |
142 | 149 | ||
@@ -370,6 +377,19 @@ Example 2: Examples of clock controller nodes are listed below. | |||
370 | clocks = <&xxti>, <&cmu_top CLK_ACLK_HEVC_400>; | 377 | clocks = <&xxti>, <&cmu_top CLK_ACLK_HEVC_400>; |
371 | }; | 378 | }; |
372 | 379 | ||
380 | cmu_isp: clock-controller@146d0000 { | ||
381 | compatible = "samsung,exynos5433-cmu-isp"; | ||
382 | reg = <0x146d0000 0x0b0c>; | ||
383 | #clock-cells = <1>; | ||
384 | |||
385 | clock-names = "oscclk", | ||
386 | "aclk_isp_dis_400", | ||
387 | "aclk_isp_400"; | ||
388 | clocks = <&xxti>, | ||
389 | <&cmu_top CLK_ACLK_ISP_DIS_400>, | ||
390 | <&cmu_top CLK_ACLK_ISP_400>; | ||
391 | }; | ||
392 | |||
373 | Example 3: UART controller node that consumes the clock generated by the clock | 393 | Example 3: UART controller node that consumes the clock generated by the clock |
374 | controller. | 394 | controller. |
375 | 395 | ||