Merge tag 'imx-weim-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc

From Shawn Guo:
This is a patch series that updates imx-weim bus driver to have it
support more i.MX SoCs.  Because there is no maintainer for
drivers/bus so far, I'm forwarding it through IMX tree for 3.12 merge
window.

* tag 'imx-weim-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6:
  drivers: bus: imx-weim: Add support for i.MX1/21/25/27/31/35/50/51/53
  drivers: bus: imx-weim: Add missing platform_driver.owner field
  drivers: bus: imx-weim: use module_platform_driver_probe()
  drivers: bus: imx-weim: Simplify error path
  drivers: bus: imx-weim: Remove private driver data

1 files changed, 12 insertions, 5 deletions

diff --git a/Documentation/devicetree/bindings/bus/imx-weim.txt b/Documentation/devicetree/bindings/bus/imx-weim.txt
index cedc2a9c4785..0fd76c405208 100644
--- a/Documentation/devicetree/bindings/bus/imx-weim.txt
+++ b/Documentation/devicetree/bindings/bus/imx-weim.txt
@@ -8,7 +8,7 @@ The actual devices are instantiated from the child nodes of a WEIM node.
 
 Required properties:
 
- - compatible:          Should be set to "fsl,imx6q-weim"
+ - compatible:          Should be set to "fsl,<soc>-weim"
  - reg:                 A resource specifier for the register space
                         (see the example below)
  - clocks:              the clock, see the example below.
@@ -21,11 +21,18 @@ Required properties:
 
 Timing property for child nodes. It is mandatory, not optional.
 
- - fsl,weim-cs-timing:  The timing array, contains 6 timing values for the
+ - fsl,weim-cs-timing:  The timing array, contains timing values for the
                         child node. We can get the CS index from the child
-                        node's "reg" property. This property contains the values
-                        for the registers EIM_CSnGCR1, EIM_CSnGCR2, EIM_CSnRCR1,
-                        EIM_CSnRCR2, EIM_CSnWCR1, EIM_CSnWCR2 in this order.
+                        node's "reg" property. The number of registers depends
+                        on the selected chip.
+                        For i.MX1, i.MX21 ("fsl,imx1-weim") there are two
+                        registers: CSxU, CSxL.
+                        For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
+                        there are three registers: CSCRxU, CSCRxL, CSCRxA.
+                        For i.MX50, i.MX53 ("fsl,imx50-weim"),
+                        i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim")
+                        there are six registers: CSxGCR1, CSxGCR2, CSxRCR1,
+                        CSxRCR2, CSxWCR1, CSxWCR2.
 
 Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: