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authorChanwoo Choi <cw00.choi@samsung.com>2014-10-26 21:11:58 -0400
committerSylwester Nawrocki <s.nawrocki@samsung.com>2014-10-30 14:53:03 -0400
commit6233fe38048a80a9fa111ddb166ce9e8e0f5f1b3 (patch)
tree4cbf0c085326945e0b794411d0c51a16329fc643 /Documentation
parentf114040e3ea6e07372334ade75d1ee0775c355e1 (diff)
clk: samsung: Document binding for Exynos4415 clock controller
This patch adds DT binding documentation for Exynos4415 SoC system clock controllers. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/exynos4415-clock.txt38
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diff --git a/Documentation/devicetree/bindings/clock/exynos4415-clock.txt b/Documentation/devicetree/bindings/clock/exynos4415-clock.txt
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1* Samsung Exynos4415 Clock Controller
2
3The Exynos4415 clock controller generates and supplies clock to various
4consumer devices within the Exynos4415 SoC.
5
6Required properties:
7
8- compatible: should be one of the following:
9 - "samsung,exynos4415-cmu" - for the main system clocks controller
10 (CMU_LEFTBUS, CMU_RIGHTBUS, CMU_TOP, CMU_CPU clock domains).
11 - "samsung,exynos4415-cmu-dmc" - for the Exynos4415 SoC DRAM Memory
12 Controller (DMC) domain clock controller.
13
14- reg: physical base address of the controller and length of memory mapped
15 region.
16
17- #clock-cells: should be 1.
18
19Each clock is assigned an identifier and client nodes can use this identifier
20to specify the clock which they consume.
21
22All available clocks are defined as preprocessor macros in
23dt-bindings/clock/exynos4415.h header and can be used in device
24tree sources.
25
26Example 1: An example of a clock controller node is listed below.
27
28 cmu: clock-controller@10030000 {
29 compatible = "samsung,exynos4415-cmu";
30 reg = <0x10030000 0x18000>;
31 #clock-cells = <1>;
32 };
33
34 cmu-dmc: clock-controller@105C0000 {
35 compatible = "samsung,exynos4415-cmu-dmc";
36 reg = <0x105C0000 0x3000>;
37 #clock-cells = <1>;
38 };