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authorDave Airlie <airlied@redhat.com>2015-04-13 03:28:57 -0400
committerDave Airlie <airlied@redhat.com>2015-04-13 03:28:57 -0400
commit1d2add28edd268a8290801ccf46b37f6d5239cdb (patch)
tree534e967b692f816434c00de0893e1089d425ae92 /Documentation
parentbb1dc08c94ead1b98e750caf535422f79363c1a2 (diff)
parent5e501ed7253b369a8a9ec553c35238a3d6808f28 (diff)
Merge tag 'imx-drm-next-2015-03-31' of git://git.pengutronix.de/git/pza/linux into drm-next
imx-drm changes to use media bus formats and LDB drm_panel support - Add media bus formats needed by imx-drm - Switch to use media bus formats to describe the pixel format on the internal parallel bus between display interface and encoders - Some preparations for TV Output via TVEv2 on i.MX5 - Add drm_panel support to the i.MX LVDS driver, allow to determine the bus pixel format from the panel descriptor. * tag 'imx-drm-next-2015-03-31' of git://git.pengutronix.de/git/pza/linux: drm/imx: imx-ldb: allow to determine bus format from the connected panel drm/imx: imx-ldb: reset display clock input when disabling LVDS drm/imx: imx-ldb: add drm_panel support drm/imx: consolidate bus format variable names drm/imx: switch to use media bus formats Add RGB666_1X24_CPADHI media bus format Add YUV8_1X24 media bus format Add BGR888_1X24 and GBR888_1X24 media bus formats Add LVDS RGB media bus formats Add RGB444_1X12 and RGB565_1X16 media bus formats drm/imx: ipuv3-crtc: Allow to divide DI clock from TVEv2 drm/imx: Add support for interlaced scanout
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/DocBook/media/v4l/subdev-formats.xml426
-rw-r--r--Documentation/devicetree/bindings/drm/imx/ldb.txt62
2 files changed, 468 insertions, 20 deletions
diff --git a/Documentation/DocBook/media/v4l/subdev-formats.xml b/Documentation/DocBook/media/v4l/subdev-formats.xml
index c5ea868e3909..18b71aff48c9 100644
--- a/Documentation/DocBook/media/v4l/subdev-formats.xml
+++ b/Documentation/DocBook/media/v4l/subdev-formats.xml
@@ -91,7 +91,9 @@ see <xref linkend="colorspaces" />.</entry>
91 <listitem><para>For formats where the total number of bits per pixel is smaller 91 <listitem><para>For formats where the total number of bits per pixel is smaller
92 than the number of bus samples per pixel times the bus width, a padding 92 than the number of bus samples per pixel times the bus width, a padding
93 value stating if the bytes are padded in their most high order bits 93 value stating if the bytes are padded in their most high order bits
94 (PADHI) or low order bits (PADLO).</para></listitem> 94 (PADHI) or low order bits (PADLO). A "C" prefix is used for component-wise
95 padding in the most high order bits (CPADHI) or low order bits (CPADLO)
96 of each separate component.</para></listitem>
95 <listitem><para>For formats where the number of bus samples per pixel is larger 97 <listitem><para>For formats where the number of bus samples per pixel is larger
96 than 1, an endianness value stating if the pixel is transferred MSB first 98 than 1, an endianness value stating if the pixel is transferred MSB first
97 (BE) or LSB first (LE).</para></listitem> 99 (BE) or LSB first (LE).</para></listitem>
@@ -192,6 +194,24 @@ see <xref linkend="colorspaces" />.</entry>
192 </row> 194 </row>
193 </thead> 195 </thead>
194 <tbody valign="top"> 196 <tbody valign="top">
197 <row id="MEDIA-BUS-FMT-RGB444-1X12">
198 <entry>MEDIA_BUS_FMT_RGB444_1X12</entry>
199 <entry>0x100e</entry>
200 <entry></entry>
201 &dash-ent-20;
202 <entry>r<subscript>3</subscript></entry>
203 <entry>r<subscript>2</subscript></entry>
204 <entry>r<subscript>1</subscript></entry>
205 <entry>r<subscript>0</subscript></entry>
206 <entry>g<subscript>3</subscript></entry>
207 <entry>g<subscript>2</subscript></entry>
208 <entry>g<subscript>1</subscript></entry>
209 <entry>g<subscript>0</subscript></entry>
210 <entry>b<subscript>3</subscript></entry>
211 <entry>b<subscript>2</subscript></entry>
212 <entry>b<subscript>1</subscript></entry>
213 <entry>b<subscript>0</subscript></entry>
214 </row>
195 <row id="MEDIA-BUS-FMT-RGB444-2X8-PADHI-BE"> 215 <row id="MEDIA-BUS-FMT-RGB444-2X8-PADHI-BE">
196 <entry>MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE</entry> 216 <entry>MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE</entry>
197 <entry>0x1001</entry> 217 <entry>0x1001</entry>
@@ -304,6 +324,28 @@ see <xref linkend="colorspaces" />.</entry>
304 <entry>g<subscript>4</subscript></entry> 324 <entry>g<subscript>4</subscript></entry>
305 <entry>g<subscript>3</subscript></entry> 325 <entry>g<subscript>3</subscript></entry>
306 </row> 326 </row>
327 <row id="MEDIA-BUS-FMT-RGB565-1X16">
328 <entry>MEDIA_BUS_FMT_RGB565_1X16</entry>
329 <entry>0x100f</entry>
330 <entry></entry>
331 &dash-ent-16;
332 <entry>r<subscript>4</subscript></entry>
333 <entry>r<subscript>3</subscript></entry>
334 <entry>r<subscript>2</subscript></entry>
335 <entry>r<subscript>1</subscript></entry>
336 <entry>r<subscript>0</subscript></entry>
337 <entry>g<subscript>5</subscript></entry>
338 <entry>g<subscript>4</subscript></entry>
339 <entry>g<subscript>3</subscript></entry>
340 <entry>g<subscript>2</subscript></entry>
341 <entry>g<subscript>1</subscript></entry>
342 <entry>g<subscript>0</subscript></entry>
343 <entry>b<subscript>4</subscript></entry>
344 <entry>b<subscript>3</subscript></entry>
345 <entry>b<subscript>2</subscript></entry>
346 <entry>b<subscript>1</subscript></entry>
347 <entry>b<subscript>0</subscript></entry>
348 </row>
307 <row id="MEDIA-BUS-FMT-BGR565-2X8-BE"> 349 <row id="MEDIA-BUS-FMT-BGR565-2X8-BE">
308 <entry>MEDIA_BUS_FMT_BGR565_2X8_BE</entry> 350 <entry>MEDIA_BUS_FMT_BGR565_2X8_BE</entry>
309 <entry>0x1005</entry> 351 <entry>0x1005</entry>
@@ -440,6 +482,96 @@ see <xref linkend="colorspaces" />.</entry>
440 <entry>b<subscript>1</subscript></entry> 482 <entry>b<subscript>1</subscript></entry>
441 <entry>b<subscript>0</subscript></entry> 483 <entry>b<subscript>0</subscript></entry>
442 </row> 484 </row>
485 <row id="MEDIA-BUS-FMT-RGB666-1X24_CPADHI">
486 <entry>MEDIA_BUS_FMT_RGB666_1X24_CPADHI</entry>
487 <entry>0x1015</entry>
488 <entry></entry>
489 &dash-ent-8;
490 <entry>0</entry>
491 <entry>0</entry>
492 <entry>r<subscript>5</subscript></entry>
493 <entry>r<subscript>4</subscript></entry>
494 <entry>r<subscript>3</subscript></entry>
495 <entry>r<subscript>2</subscript></entry>
496 <entry>r<subscript>1</subscript></entry>
497 <entry>r<subscript>0</subscript></entry>
498 <entry>0</entry>
499 <entry>0</entry>
500 <entry>g<subscript>5</subscript></entry>
501 <entry>g<subscript>4</subscript></entry>
502 <entry>g<subscript>3</subscript></entry>
503 <entry>g<subscript>2</subscript></entry>
504 <entry>g<subscript>1</subscript></entry>
505 <entry>g<subscript>0</subscript></entry>
506 <entry>0</entry>
507 <entry>0</entry>
508 <entry>b<subscript>5</subscript></entry>
509 <entry>b<subscript>4</subscript></entry>
510 <entry>b<subscript>3</subscript></entry>
511 <entry>b<subscript>2</subscript></entry>
512 <entry>b<subscript>1</subscript></entry>
513 <entry>b<subscript>0</subscript></entry>
514 </row>
515 <row id="MEDIA-BUS-FMT-BGR888-1X24">
516 <entry>MEDIA_BUS_FMT_BGR888_1X24</entry>
517 <entry>0x1013</entry>
518 <entry></entry>
519 &dash-ent-8;
520 <entry>b<subscript>7</subscript></entry>
521 <entry>b<subscript>6</subscript></entry>
522 <entry>b<subscript>5</subscript></entry>
523 <entry>b<subscript>4</subscript></entry>
524 <entry>b<subscript>3</subscript></entry>
525 <entry>b<subscript>2</subscript></entry>
526 <entry>b<subscript>1</subscript></entry>
527 <entry>b<subscript>0</subscript></entry>
528 <entry>g<subscript>7</subscript></entry>
529 <entry>g<subscript>6</subscript></entry>
530 <entry>g<subscript>5</subscript></entry>
531 <entry>g<subscript>4</subscript></entry>
532 <entry>g<subscript>3</subscript></entry>
533 <entry>g<subscript>2</subscript></entry>
534 <entry>g<subscript>1</subscript></entry>
535 <entry>g<subscript>0</subscript></entry>
536 <entry>r<subscript>7</subscript></entry>
537 <entry>r<subscript>6</subscript></entry>
538 <entry>r<subscript>5</subscript></entry>
539 <entry>r<subscript>4</subscript></entry>
540 <entry>r<subscript>3</subscript></entry>
541 <entry>r<subscript>2</subscript></entry>
542 <entry>r<subscript>1</subscript></entry>
543 <entry>r<subscript>0</subscript></entry>
544 </row>
545 <row id="MEDIA-BUS-FMT-GBR888-1X24">
546 <entry>MEDIA_BUS_FMT_GBR888_1X24</entry>
547 <entry>0x1014</entry>
548 <entry></entry>
549 &dash-ent-8;
550 <entry>g<subscript>7</subscript></entry>
551 <entry>g<subscript>6</subscript></entry>
552 <entry>g<subscript>5</subscript></entry>
553 <entry>g<subscript>4</subscript></entry>
554 <entry>g<subscript>3</subscript></entry>
555 <entry>g<subscript>2</subscript></entry>
556 <entry>g<subscript>1</subscript></entry>
557 <entry>g<subscript>0</subscript></entry>
558 <entry>b<subscript>7</subscript></entry>
559 <entry>b<subscript>6</subscript></entry>
560 <entry>b<subscript>5</subscript></entry>
561 <entry>b<subscript>4</subscript></entry>
562 <entry>b<subscript>3</subscript></entry>
563 <entry>b<subscript>2</subscript></entry>
564 <entry>b<subscript>1</subscript></entry>
565 <entry>b<subscript>0</subscript></entry>
566 <entry>r<subscript>7</subscript></entry>
567 <entry>r<subscript>6</subscript></entry>
568 <entry>r<subscript>5</subscript></entry>
569 <entry>r<subscript>4</subscript></entry>
570 <entry>r<subscript>3</subscript></entry>
571 <entry>r<subscript>2</subscript></entry>
572 <entry>r<subscript>1</subscript></entry>
573 <entry>r<subscript>0</subscript></entry>
574 </row>
443 <row id="MEDIA-BUS-FMT-RGB888-1X24"> 575 <row id="MEDIA-BUS-FMT-RGB888-1X24">
444 <entry>MEDIA_BUS_FMT_RGB888_1X24</entry> 576 <entry>MEDIA_BUS_FMT_RGB888_1X24</entry>
445 <entry>0x100a</entry> 577 <entry>0x100a</entry>
@@ -582,6 +714,261 @@ see <xref linkend="colorspaces" />.</entry>
582 </tbody> 714 </tbody>
583 </tgroup> 715 </tgroup>
584 </table> 716 </table>
717
718 <para>On LVDS buses, usually each sample is transferred serialized in
719 seven time slots per pixel clock, on three (18-bit) or four (24-bit)
720 differential data pairs at the same time. The remaining bits are used for
721 control signals as defined by SPWG/PSWG/VESA or JEIDA standards.
722 The 24-bit RGB format serialized in seven time slots on four lanes using
723 JEIDA defined bit mapping will be named
724 <constant>MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA</constant>, for example.
725 </para>
726
727 <table pgwide="0" frame="none" id="v4l2-mbus-pixelcode-rgb-lvds">
728 <title>LVDS RGB formats</title>
729 <tgroup cols="8">
730 <colspec colname="id" align="left" />
731 <colspec colname="code" align="center" />
732 <colspec colname="slot" align="center" />
733 <colspec colname="lane" />
734 <colspec colnum="5" colname="l03" align="center" />
735 <colspec colnum="6" colname="l02" align="center" />
736 <colspec colnum="7" colname="l01" align="center" />
737 <colspec colnum="8" colname="l00" align="center" />
738 <spanspec namest="l03" nameend="l00" spanname="l0" />
739 <thead>
740 <row>
741 <entry>Identifier</entry>
742 <entry>Code</entry>
743 <entry></entry>
744 <entry></entry>
745 <entry spanname="l0">Data organization</entry>
746 </row>
747 <row>
748 <entry></entry>
749 <entry></entry>
750 <entry>Timeslot</entry>
751 <entry>Lane</entry>
752 <entry>3</entry>
753 <entry>2</entry>
754 <entry>1</entry>
755 <entry>0</entry>
756 </row>
757 </thead>
758 <tbody valign="top">
759 <row id="MEDIA-BUS-FMT-RGB666-1X7X3-SPWG">
760 <entry>MEDIA_BUS_FMT_RGB666_1X7X3_SPWG</entry>
761 <entry>0x1010</entry>
762 <entry>0</entry>
763 <entry></entry>
764 <entry>-</entry>
765 <entry>d</entry>
766 <entry>b<subscript>1</subscript></entry>
767 <entry>g<subscript>0</subscript></entry>
768 </row>
769 <row>
770 <entry></entry>
771 <entry></entry>
772 <entry>1</entry>
773 <entry></entry>
774 <entry>-</entry>
775 <entry>d</entry>
776 <entry>b<subscript>0</subscript></entry>
777 <entry>r<subscript>5</subscript></entry>
778 </row>
779 <row>
780 <entry></entry>
781 <entry></entry>
782 <entry>2</entry>
783 <entry></entry>
784 <entry>-</entry>
785 <entry>d</entry>
786 <entry>g<subscript>5</subscript></entry>
787 <entry>r<subscript>4</subscript></entry>
788 </row>
789 <row>
790 <entry></entry>
791 <entry></entry>
792 <entry>3</entry>
793 <entry></entry>
794 <entry>-</entry>
795 <entry>b<subscript>5</subscript></entry>
796 <entry>g<subscript>4</subscript></entry>
797 <entry>r<subscript>3</subscript></entry>
798 </row>
799 <row>
800 <entry></entry>
801 <entry></entry>
802 <entry>4</entry>
803 <entry></entry>
804 <entry>-</entry>
805 <entry>b<subscript>4</subscript></entry>
806 <entry>g<subscript>3</subscript></entry>
807 <entry>r<subscript>2</subscript></entry>
808 </row>
809 <row>
810 <entry></entry>
811 <entry></entry>
812 <entry>5</entry>
813 <entry></entry>
814 <entry>-</entry>
815 <entry>b<subscript>3</subscript></entry>
816 <entry>g<subscript>2</subscript></entry>
817 <entry>r<subscript>1</subscript></entry>
818 </row>
819 <row>
820 <entry></entry>
821 <entry></entry>
822 <entry>6</entry>
823 <entry></entry>
824 <entry>-</entry>
825 <entry>b<subscript>2</subscript></entry>
826 <entry>g<subscript>1</subscript></entry>
827 <entry>r<subscript>0</subscript></entry>
828 </row>
829 <row id="MEDIA-BUS-FMT-RGB888-1X7X4-SPWG">
830 <entry>MEDIA_BUS_FMT_RGB888_1X7X4_SPWG</entry>
831 <entry>0x1011</entry>
832 <entry>0</entry>
833 <entry></entry>
834 <entry>d</entry>
835 <entry>d</entry>
836 <entry>b<subscript>1</subscript></entry>
837 <entry>g<subscript>0</subscript></entry>
838 </row>
839 <row>
840 <entry></entry>
841 <entry></entry>
842 <entry>1</entry>
843 <entry></entry>
844 <entry>b<subscript>7</subscript></entry>
845 <entry>d</entry>
846 <entry>b<subscript>0</subscript></entry>
847 <entry>r<subscript>5</subscript></entry>
848 </row>
849 <row>
850 <entry></entry>
851 <entry></entry>
852 <entry>2</entry>
853 <entry></entry>
854 <entry>b<subscript>6</subscript></entry>
855 <entry>d</entry>
856 <entry>g<subscript>5</subscript></entry>
857 <entry>r<subscript>4</subscript></entry>
858 </row>
859 <row>
860 <entry></entry>
861 <entry></entry>
862 <entry>3</entry>
863 <entry></entry>
864 <entry>g<subscript>7</subscript></entry>
865 <entry>b<subscript>5</subscript></entry>
866 <entry>g<subscript>4</subscript></entry>
867 <entry>r<subscript>3</subscript></entry>
868 </row>
869 <row>
870 <entry></entry>
871 <entry></entry>
872 <entry>4</entry>
873 <entry></entry>
874 <entry>g<subscript>6</subscript></entry>
875 <entry>b<subscript>4</subscript></entry>
876 <entry>g<subscript>3</subscript></entry>
877 <entry>r<subscript>2</subscript></entry>
878 </row>
879 <row>
880 <entry></entry>
881 <entry></entry>
882 <entry>5</entry>
883 <entry></entry>
884 <entry>r<subscript>7</subscript></entry>
885 <entry>b<subscript>3</subscript></entry>
886 <entry>g<subscript>2</subscript></entry>
887 <entry>r<subscript>1</subscript></entry>
888 </row>
889 <row>
890 <entry></entry>
891 <entry></entry>
892 <entry>6</entry>
893 <entry></entry>
894 <entry>r<subscript>6</subscript></entry>
895 <entry>b<subscript>2</subscript></entry>
896 <entry>g<subscript>1</subscript></entry>
897 <entry>r<subscript>0</subscript></entry>
898 </row>
899 <row id="MEDIA-BUS-FMT-RGB888-1X7X4-JEIDA">
900 <entry>MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA</entry>
901 <entry>0x1012</entry>
902 <entry>0</entry>
903 <entry></entry>
904 <entry>d</entry>
905 <entry>d</entry>
906 <entry>b<subscript>3</subscript></entry>
907 <entry>g<subscript>2</subscript></entry>
908 </row>
909 <row>
910 <entry></entry>
911 <entry></entry>
912 <entry>1</entry>
913 <entry></entry>
914 <entry>b<subscript>1</subscript></entry>
915 <entry>d</entry>
916 <entry>b<subscript>2</subscript></entry>
917 <entry>r<subscript>7</subscript></entry>
918 </row>
919 <row>
920 <entry></entry>
921 <entry></entry>
922 <entry>2</entry>
923 <entry></entry>
924 <entry>b<subscript>0</subscript></entry>
925 <entry>d</entry>
926 <entry>g<subscript>7</subscript></entry>
927 <entry>r<subscript>6</subscript></entry>
928 </row>
929 <row>
930 <entry></entry>
931 <entry></entry>
932 <entry>3</entry>
933 <entry></entry>
934 <entry>g<subscript>1</subscript></entry>
935 <entry>b<subscript>7</subscript></entry>
936 <entry>g<subscript>6</subscript></entry>
937 <entry>r<subscript>5</subscript></entry>
938 </row>
939 <row>
940 <entry></entry>
941 <entry></entry>
942 <entry>4</entry>
943 <entry></entry>
944 <entry>g<subscript>0</subscript></entry>
945 <entry>b<subscript>6</subscript></entry>
946 <entry>g<subscript>5</subscript></entry>
947 <entry>r<subscript>4</subscript></entry>
948 </row>
949 <row>
950 <entry></entry>
951 <entry></entry>
952 <entry>5</entry>
953 <entry></entry>
954 <entry>r<subscript>1</subscript></entry>
955 <entry>b<subscript>5</subscript></entry>
956 <entry>g<subscript>4</subscript></entry>
957 <entry>r<subscript>3</subscript></entry>
958 </row>
959 <row>
960 <entry></entry>
961 <entry></entry>
962 <entry>6</entry>
963 <entry></entry>
964 <entry>r<subscript>0</subscript></entry>
965 <entry>b<subscript>4</subscript></entry>
966 <entry>g<subscript>3</subscript></entry>
967 <entry>r<subscript>2</subscript></entry>
968 </row>
969 </tbody>
970 </tgroup>
971 </table>
585 </section> 972 </section>
586 973
587 <section> 974 <section>
@@ -2660,6 +3047,43 @@ see <xref linkend="colorspaces" />.</entry>
2660 <entry>u<subscript>1</subscript></entry> 3047 <entry>u<subscript>1</subscript></entry>
2661 <entry>u<subscript>0</subscript></entry> 3048 <entry>u<subscript>0</subscript></entry>
2662 </row> 3049 </row>
3050 <row id="MEDIA-BUS-FMT-YUV8-1X24">
3051 <entry>MEDIA_BUS_FMT_YUV8_1X24</entry>
3052 <entry>0x2024</entry>
3053 <entry></entry>
3054 <entry>-</entry>
3055 <entry>-</entry>
3056 <entry>-</entry>
3057 <entry>-</entry>
3058 <entry>-</entry>
3059 <entry>-</entry>
3060 <entry>-</entry>
3061 <entry>-</entry>
3062 <entry>y<subscript>7</subscript></entry>
3063 <entry>y<subscript>6</subscript></entry>
3064 <entry>y<subscript>5</subscript></entry>
3065 <entry>y<subscript>4</subscript></entry>
3066 <entry>y<subscript>3</subscript></entry>
3067 <entry>y<subscript>2</subscript></entry>
3068 <entry>y<subscript>1</subscript></entry>
3069 <entry>y<subscript>0</subscript></entry>
3070 <entry>u<subscript>7</subscript></entry>
3071 <entry>u<subscript>6</subscript></entry>
3072 <entry>u<subscript>5</subscript></entry>
3073 <entry>u<subscript>4</subscript></entry>
3074 <entry>u<subscript>3</subscript></entry>
3075 <entry>u<subscript>2</subscript></entry>
3076 <entry>u<subscript>1</subscript></entry>
3077 <entry>u<subscript>0</subscript></entry>
3078 <entry>v<subscript>7</subscript></entry>
3079 <entry>v<subscript>6</subscript></entry>
3080 <entry>v<subscript>5</subscript></entry>
3081 <entry>v<subscript>4</subscript></entry>
3082 <entry>v<subscript>3</subscript></entry>
3083 <entry>v<subscript>2</subscript></entry>
3084 <entry>v<subscript>1</subscript></entry>
3085 <entry>v<subscript>0</subscript></entry>
3086 </row>
2663 <row id="MEDIA-BUS-FMT-YUV10-1X30"> 3087 <row id="MEDIA-BUS-FMT-YUV10-1X30">
2664 <entry>MEDIA_BUS_FMT_YUV10_1X30</entry> 3088 <entry>MEDIA_BUS_FMT_YUV10_1X30</entry>
2665 <entry>0x2016</entry> 3089 <entry>0x2016</entry>
diff --git a/Documentation/devicetree/bindings/drm/imx/ldb.txt b/Documentation/devicetree/bindings/drm/imx/ldb.txt
index 443bcb6134d5..9a21366436f6 100644
--- a/Documentation/devicetree/bindings/drm/imx/ldb.txt
+++ b/Documentation/devicetree/bindings/drm/imx/ldb.txt
@@ -44,23 +44,30 @@ Optional properties:
44LVDS Channel 44LVDS Channel
45============ 45============
46 46
47Each LVDS Channel has to contain a display-timings node that describes the 47Each LVDS Channel has to contain either an of graph link to a panel device node
48video timings for the connected LVDS display. For detailed information, also 48or a display-timings node that describes the video timings for the connected
49have a look at Documentation/devicetree/bindings/video/display-timing.txt. 49LVDS display as well as the fsl,data-mapping and fsl,data-width properties.
50 50
51Required properties: 51Required properties:
52 - reg : should be <0> or <1> 52 - reg : should be <0> or <1>
53 - port: Input and output port nodes with endpoint definitions as defined in
54 Documentation/devicetree/bindings/graph.txt.
55 On i.MX5, the internal two-input-multiplexer is used. Due to hardware
56 limitations, only one input port (port@[0,1]) can be used for each channel
57 (lvds-channel@[0,1], respectively).
58 On i.MX6, there should be four input ports (port@[0-3]) that correspond
59 to the four LVDS multiplexer inputs.
60 A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected
61 to a panel input port. Optionally, the output port can be left out if
62 display-timings are used instead.
63
64Optional properties (required if display-timings are used):
65 - display-timings : A node that describes the display timings as defined in
66 Documentation/devicetree/bindings/video/display-timing.txt.
53 - fsl,data-mapping : should be "spwg" or "jeida" 67 - fsl,data-mapping : should be "spwg" or "jeida"
54 This describes how the color bits are laid out in the 68 This describes how the color bits are laid out in the
55 serialized LVDS signal. 69 serialized LVDS signal.
56 - fsl,data-width : should be <18> or <24> 70 - fsl,data-width : should be <18> or <24>
57 - port: A port node with endpoint definitions as defined in
58 Documentation/devicetree/bindings/media/video-interfaces.txt.
59 On i.MX5, the internal two-input-multiplexer is used.
60 Due to hardware limitations, only one port (port@[0,1])
61 can be used for each channel (lvds-channel@[0,1], respectively)
62 On i.MX6, there should be four ports (port@[0-3]) that correspond
63 to the four LVDS multiplexer inputs.
64 71
65example: 72example:
66 73
@@ -73,23 +80,21 @@ ldb: ldb@53fa8008 {
73 #size-cells = <0>; 80 #size-cells = <0>;
74 compatible = "fsl,imx53-ldb"; 81 compatible = "fsl,imx53-ldb";
75 gpr = <&gpr>; 82 gpr = <&gpr>;
76 clocks = <&clks 122>, <&clks 120>, 83 clocks = <&clks IMX5_CLK_LDB_DI0_SEL>,
77 <&clks 115>, <&clks 116>, 84 <&clks IMX5_CLK_LDB_DI1_SEL>,
78 <&clks 123>, <&clks 85>; 85 <&clks IMX5_CLK_IPU_DI0_SEL>,
86 <&clks IMX5_CLK_IPU_DI1_SEL>,
87 <&clks IMX5_CLK_LDB_DI0_GATE>,
88 <&clks IMX5_CLK_LDB_DI1_GATE>;
79 clock-names = "di0_pll", "di1_pll", 89 clock-names = "di0_pll", "di1_pll",
80 "di0_sel", "di1_sel", 90 "di0_sel", "di1_sel",
81 "di0", "di1"; 91 "di0", "di1";
82 92
93 /* Using an of-graph endpoint link to connect the panel */
83 lvds-channel@0 { 94 lvds-channel@0 {
84 #address-cells = <1>; 95 #address-cells = <1>;
85 #size-cells = <0>; 96 #size-cells = <0>;
86 reg = <0>; 97 reg = <0>;
87 fsl,data-mapping = "spwg";
88 fsl,data-width = <24>;
89
90 display-timings {
91 /* ... */
92 };
93 98
94 port@0 { 99 port@0 {
95 reg = <0>; 100 reg = <0>;
@@ -98,8 +103,17 @@ ldb: ldb@53fa8008 {
98 remote-endpoint = <&ipu_di0_lvds0>; 103 remote-endpoint = <&ipu_di0_lvds0>;
99 }; 104 };
100 }; 105 };
106
107 port@2 {
108 reg = <2>;
109
110 lvds0_out: endpoint {
111 remote-endpoint = <&panel_in>;
112 };
113 };
101 }; 114 };
102 115
116 /* Using display-timings and fsl,data-mapping/width instead */
103 lvds-channel@1 { 117 lvds-channel@1 {
104 #address-cells = <1>; 118 #address-cells = <1>;
105 #size-cells = <0>; 119 #size-cells = <0>;
@@ -120,3 +134,13 @@ ldb: ldb@53fa8008 {
120 }; 134 };
121 }; 135 };
122}; 136};
137
138panel: lvds-panel {
139 /* ... */
140
141 port {
142 panel_in: endpoint {
143 remote-endpoint = <&lvds0_out>;
144 };
145 };
146};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-31 14:04:26 -0400