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authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2013-05-03 01:33:27 -0400
committerMike Turquette <mturquette@linaro.org>2013-05-29 01:50:31 -0400
commit1a0483d2a4c2c5e218d415c90d1a62b3b917d34e (patch)
tree14f9c34645c52c16e1a0d32986629b0fdeb0f153 /Documentation
parent555eae97358082be3a46572464829c27b96ed8f1 (diff)
clk: si5351: Allow user to define disabled state for every clock output
This patch adds platform data and DT bindings to allow to overwrite the stored disabled state for each clock output. Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/silabs,si5351.txt5
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/silabs,si5351.txt b/Documentation/devicetree/bindings/clock/silabs,si5351.txt
index cc374651662c..66c75b2d6158 100644
--- a/Documentation/devicetree/bindings/clock/silabs,si5351.txt
+++ b/Documentation/devicetree/bindings/clock/silabs,si5351.txt
@@ -44,6 +44,11 @@ Optional child node properties:
44- silabs,multisynth-source: source pll A(0) or B(1) of corresponding multisynth 44- silabs,multisynth-source: source pll A(0) or B(1) of corresponding multisynth
45 divider. 45 divider.
46- silabs,pll-master: boolean, multisynth can change pll frequency. 46- silabs,pll-master: boolean, multisynth can change pll frequency.
47- silabs,disable-state : clock output disable state, shall be
48 0 = clock output is driven LOW when disabled
49 1 = clock output is driven HIGH when disabled
50 2 = clock output is FLOATING (HIGH-Z) when disabled
51 3 = clock output is NEVER disabled
47 52
48==Example== 53==Example==
49 54