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authorLinus Torvalds <torvalds@linux-foundation.org>2008-02-01 22:29:33 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2008-02-01 22:29:33 -0500
commit215e871aaa3d94540121a3809d80d0c5e5686e4f (patch)
tree0ed6469c5ad04db8cfa0edb58c676d5155df20cd /Documentation
parentb6cf160c4b788a31f6a4017a469b956ca77febf4 (diff)
parentfd7d1ced29e5beb88c9068801da7a362606d8273 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6: (64 commits) PCI: make pci_bus a struct device PCI: fix codingstyle issues in include/linux/pci.h PCI: fix codingstyle issues in drivers/pci/pci.h PCI: PCIE ASPM support PCI: Fix fakephp deadlock PCI: modify SB700 SATA MSI quirk PCI: Run ACPI _OSC method on root bridges only PCI ACPI: AER driver should only register PCIe devices with _OSC PCI ACPI: Added a function to register _OSC with only PCIe devices. PCI: constify function pointer tables PCI: Convert drivers/pci/proc.c to use unlocked_ioctl pciehp: block new requests from the device before power off pciehp: workaround against Bad DLLP during power off pciehp: wait for 1000ms before LED operation after power off PCI: Remove pci_enable_device_bars() from documentation PCI: Remove pci_enable_device_bars() PCI: Remove users of pci_enable_device_bars() PCI: Add pci_enable_device_{io,mem} intefaces PCI: avoid save the same type of cap multiple times PCI: correctly initialize a structure for pcie_save_pcix_state() ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/pci.txt37
1 files changed, 1 insertions, 36 deletions
diff --git a/Documentation/pci.txt b/Documentation/pci.txt
index 7754f5aea4e9..72b20c639596 100644
--- a/Documentation/pci.txt
+++ b/Documentation/pci.txt
@@ -274,8 +274,6 @@ the PCI device by calling pci_enable_device(). This will:
274 o allocate an IRQ (if BIOS did not). 274 o allocate an IRQ (if BIOS did not).
275 275
276NOTE: pci_enable_device() can fail! Check the return value. 276NOTE: pci_enable_device() can fail! Check the return value.
277NOTE2: Also see pci_enable_device_bars() below. Drivers can
278 attempt to enable only a subset of BARs they need.
279 277
280[ OS BUG: we don't check resource allocations before enabling those 278[ OS BUG: we don't check resource allocations before enabling those
281 resources. The sequence would make more sense if we called 279 resources. The sequence would make more sense if we called
@@ -605,40 +603,7 @@ device lists. This is still possible but discouraged.
605 603
606 604
607 605
60810. pci_enable_device_bars() and Legacy I/O Port space 60610. MMIO Space and "Write Posting"
609~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
610
611Large servers may not be able to provide I/O port resources to all PCI
612devices. I/O Port space is only 64KB on Intel Architecture[1] and is
613likely also fragmented since the I/O base register of PCI-to-PCI
614bridge will usually be aligned to a 4KB boundary[2]. On such systems,
615pci_enable_device() and pci_request_region() will fail when
616attempting to enable I/O Port regions that don't have I/O Port
617resources assigned.
618
619Fortunately, many PCI devices which request I/O Port resources also
620provide access to the same registers via MMIO BARs. These devices can
621be handled without using I/O port space and the drivers typically
622offer a CONFIG_ option to only use MMIO regions
623(e.g. CONFIG_TULIP_MMIO). PCI devices typically provide I/O port
624interface for legacy OSes and will work when I/O port resources are not
625assigned. The "PCI Local Bus Specification Revision 3.0" discusses
626this on p.44, "IMPLEMENTATION NOTE".
627
628If your PCI device driver doesn't need I/O port resources assigned to
629I/O Port BARs, you should use pci_enable_device_bars() instead of
630pci_enable_device() in order not to enable I/O port regions for the
631corresponding devices. In addition, you should use
632pci_request_selected_regions() and pci_release_selected_regions()
633instead of pci_request_regions()/pci_release_regions() in order not to
634request/release I/O port regions for the corresponding devices.
635
636[1] Some systems support 64KB I/O port space per PCI segment.
637[2] Some PCI-to-PCI bridges support optional 1KB aligned I/O base.
638
639
640
64111. MMIO Space and "Write Posting"
642~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 607~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
643 608
644Converting a driver from using I/O Port space to using MMIO space 609Converting a driver from using I/O Port space to using MMIO space