Merge branch 'for-linus/i2c' of git://git.fluff.org/bjdooks/linux

* 'for-linus/i2c' of git://git.fluff.org/bjdooks/linux:
  i2c: Add support for Xilinx XPS IIC Bus Interface
  i2c: omap: Add support for 16-bit registers
  i2c-pnx: fix setting start/stop condition
  powerpc: doc/dts-bindings: update doc of FSL I2C bindings
  i2c-mpc: add support for the MPC512x processors from Freescale
  i2c-mpc: rename "setclock" initialization functions to "setup"
  i2c-mpc: use __devinit[data] for initialization functions and data
  i2c/imx: don't add probe function to the driver struct
  i2c: Add support for Ux500/Nomadik I2C controller

1 files changed, 22 insertions, 8 deletions

diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
index b6d2e21474f9..50da20310585 100644
--- a/Documentation/powerpc/dts-bindings/fsl/i2c.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -2,15 +2,14 @@
 
 Required properties :
 
- - device_type : Should be "i2c"
  - reg : Offset and length of the register set for the device
+ - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
+   compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
+   mpc5200 or mpc5200b. For the mpc5121, an additional node
+   "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
 
 Recommended properties :
 
- - compatible : compatibility list with 2 entries, the first should
-   be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor,
-   e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
-   should be "fsl-i2c".
  - interrupts : <a b> where a is the interrupt number and b is a
    field that represents an encoding of the sense and level
    information for the interrupt.  This should be encoded based on
@@ -24,25 +23,40 @@ Recommended properties :
 
 Examples :
 
+        /* MPC5121 based board */
+        i2c@1740 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,mpc5121-i2c", "fsl-i2c";
+                reg = <0x1740 0x20>;
+                interrupts = <11 0x8>;
+                interrupt-parent = <&ipic>;
+                clock-frequency = <100000>;
+        };
+
+        i2ccontrol@1760 {
+                compatible = "fsl,mpc5121-i2c-ctrl";
+                reg = <0x1760 0x8>;
+        };
+
+        /* MPC5200B based board */
         i2c@3d00 {
                 #address-cells = <1>;
                 #size-cells = <0>;
                 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                cell-index = <0>;
                 reg = <0x3d00 0x40>;
                 interrupts = <2 15 0>;
                 interrupt-parent = <&mpc5200_pic>;
                 fsl,preserve-clocking;
         };
 
+        /* MPC8544 base board */
         i2c@3100 {
                 #address-cells = <1>;
                 #size-cells = <0>;
-                cell-index = <1>;
                 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
                 reg = <0x3100 0x100>;
                 interrupts = <43 2>;
                 interrupt-parent = <&mpic>;
                 clock-frequency = <400000>;
         };
-