Merge tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd

Pull mtd update from David Woodhouse:
 - More robust parsing especially of xattr data in JFFS2
 - Updates to mxc_nand and gpmi drivers to support new boards and device tree
 - Improve consistency of information about ECC strength in NAND devices
 - Clean up partition handling of plat_nand
 - Support NAND drivers without dedicated access to OOB area
 - BCH hardware ECC support for OMAP
 - Other fixes and cleanups, and a few new device IDs

Fixed trivial conflict in drivers/mtd/nand/gpmi-nand/gpmi-nand.c due to
added include files next to each other.

* tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd: (75 commits)
  mtd: mxc_nand: move ecc strengh setup before nand_scan_tail
  mtd: block2mtd: fix recursive call of mtd_writev
  mtd: gpmi-nand: define ecc.strength
  mtd: of_parts: fix breakage in Kconfig
  mtd: nand: fix scan_read_raw_oob
  mtd: docg3 fix in-middle of blocks reads
  mtd: cfi_cmdset_0002: Slight cleanup of fixup messages
  mtd: add fixup for S29NS512P NOR flash.
  jffs2: allow to complete xattr integrity check on first GC scan
  jffs2: allow to discriminate between recoverable and non-recoverable errors
  mtd: nand: omap: add support for hardware BCH ecc
  ARM: OMAP3: gpmc: add BCH ecc api and modes
  mtd: nand: check the return code of 'read_oob/read_oob_raw'
  mtd: nand: remove 'sndcmd' parameter of 'read_oob/read_oob_raw'
  mtd: m25p80: Add support for Winbond W25Q80BW
  jffs2: get rid of jffs2_sync_super
  jffs2: remove unnecessary GC pass on sync
  jffs2: remove unnecessary GC pass on umount
  jffs2: remove lock_super
  mtd: gpmi: add gpmi support for mx6q
  ...

4 files changed, 103 insertions, 2 deletions

diff --git a/Documentation/ABI/testing/sysfs-class-mtd b/Documentation/ABI/testing/sysfs-class-mtd
index 4d55a1888981..db1ad7e34fc3 100644
--- a/Documentation/ABI/testing/sysfs-class-mtd
+++ b/Documentation/ABI/testing/sysfs-class-mtd
@@ -123,3 +123,54 @@ Description:
                 half page, or a quarter page).
 
                 In the case of ECC NOR, it is the ECC block size.
+
+What:           /sys/class/mtd/mtdX/ecc_strength
+Date:           April 2012
+KernelVersion:  3.4
+Contact:        linux-mtd@lists.infradead.org
+Description:
+                Maximum number of bit errors that the device is capable of
+                correcting within each region covering an ecc step.  This will
+                always be a non-negative integer.  Note that some devices will
+                have multiple ecc steps within each writesize region.
+
+                In the case of devices lacking any ECC capability, it is 0.
+
+What:           /sys/class/mtd/mtdX/bitflip_threshold
+Date:           April 2012
+KernelVersion:  3.4
+Contact:        linux-mtd@lists.infradead.org
+Description:
+                This allows the user to examine and adjust the criteria by which
+                mtd returns -EUCLEAN from mtd_read().  If the maximum number of
+                bit errors that were corrected on any single region comprising
+                an ecc step (as reported by the driver) equals or exceeds this
+                value, -EUCLEAN is returned.  Otherwise, absent an error, 0 is
+                returned.  Higher layers (e.g., UBI) use this return code as an
+                indication that an erase block may be degrading and should be
+                scrutinized as a candidate for being marked as bad.
+
+                The initial value may be specified by the flash device driver.
+                If not, then the default value is ecc_strength.
+
+                The introduction of this feature brings a subtle change to the
+                meaning of the -EUCLEAN return code.  Previously, it was
+                interpreted to mean simply "one or more bit errors were
+                corrected".  Its new interpretation can be phrased as "a
+                dangerously high number of bit errors were corrected on one or
+                more regions comprising an ecc step".  The precise definition of
+                "dangerously high" can be adjusted by the user with
+                bitflip_threshold.  Users are discouraged from doing this,
+                however, unless they know what they are doing and have intimate
+                knowledge of the properties of their device.  Broadly speaking,
+                bitflip_threshold should be low enough to detect genuine erase
+                block degradation, but high enough to avoid the consequences of
+                a persistent return value of -EUCLEAN on devices where sticky
+                bitflips occur.  Note that if bitflip_threshold exceeds
+                ecc_strength, -EUCLEAN is never returned by mtd_read().
+                Conversely, if bitflip_threshold is zero, -EUCLEAN is always
+                returned, absent a hard error.
+
+                This is generally applicable only to NAND flash devices with ECC
+                capability.  It is ignored on devices lacking ECC capability;
+                i.e., devices for which ecc_strength is zero.
diff --git a/Documentation/DocBook/mtdnand.tmpl b/Documentation/DocBook/mtdnand.tmpl
index 0c674be0d3c6..e0aedb7a7827 100644
--- a/Documentation/DocBook/mtdnand.tmpl
+++ b/Documentation/DocBook/mtdnand.tmpl
@@ -1119,8 +1119,6 @@ in this page</entry>
                 These constants are defined in nand.h. They are ored together to describe
                 the chip functionality.
                 <programlisting>
-/* Chip can not auto increment pages */
-#define NAND_NO_AUTOINCR        0x00000001
 /* Buswitdh is 16 bit */
 #define NAND_BUSWIDTH_16        0x00000002
 /* Device supports partial programming without padding */
diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
new file mode 100644
index 000000000000..1a5bbd346d22
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
@@ -0,0 +1,33 @@
+* Freescale General-Purpose Media Interface (GPMI)
+
+The GPMI nand controller provides an interface to control the
+NAND flash chips. We support only one NAND chip now.
+
+Required properties:
+  - compatible : should be "fsl,<chip>-gpmi-nand"
+  - reg : should contain registers location and length for gpmi and bch.
+  - reg-names: Should contain the reg names "gpmi-nand" and "bch"
+  - interrupts : The first is the DMA interrupt number for GPMI.
+                 The second is the BCH interrupt number.
+  - interrupt-names : The interrupt names "gpmi-dma", "bch";
+  - fsl,gpmi-dma-channel : Should contain the dma channel it uses.
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. See partition.txt for more detail.
+
+Examples:
+
+gpmi-nand@8000c000 {
+        compatible = "fsl,imx28-gpmi-nand";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg = <0x8000c000 2000>, <0x8000a000 2000>;
+        reg-names = "gpmi-nand", "bch";
+        interrupts = <88>, <41>;
+        interrupt-names = "gpmi-dma", "bch";
+        fsl,gpmi-dma-channel = <4>;
+
+        partition@0 {
+        ...
+        };
+};
diff --git a/Documentation/devicetree/bindings/mtd/mxc-nand.txt b/Documentation/devicetree/bindings/mtd/mxc-nand.txt
new file mode 100644
index 000000000000..b5833d11c7be
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mxc-nand.txt
@@ -0,0 +1,19 @@
+* Freescale's mxc_nand
+
+Required properties:
+- compatible: "fsl,imxXX-nand"
+- reg: address range of the nfc block
+- interrupts: irq to be used
+- nand-bus-width: see nand.txt
+- nand-ecc-mode: see nand.txt
+- nand-on-flash-bbt: see nand.txt
+
+Example:
+
+        nand@d8000000 {
+                compatible = "fsl,imx27-nand";
+                reg = <0xd8000000 0x1000>;
+                interrupts = <29>;
+                nand-bus-width = <8>;
+                nand-ecc-mode = "hw";
+        };