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authorThomas Abraham <thomas.abraham@linaro.org>2013-03-06 06:36:16 -0500
committerChris Ball <cjb@laptop.org>2013-03-22 12:33:21 -0400
commite19499ae10903807acbaa07a28d4b56d508ac339 (patch)
tree9d8014e641e9795803437c81582483e586424676 /Documentation
parent4a2d8ecce0be8240618e133077724abb5b36c1ef (diff)
mmc: sdhci-s3c: let device core setup the default pin configuration
With device core now able to setup the default pin configuration, the call to devm_pinctrl_get_select_default can be removed. And the pin configuration code based on the deprecated Samsung specific gpio bindings is also removed. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/mmc/samsung-sdhci.txt35
1 files changed, 4 insertions, 31 deletions
diff --git a/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
index 3b3a1ee055ff..328e990d2546 100644
--- a/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt
@@ -5,13 +5,6 @@ MMC, SD and eMMC storage mediums. This file documents differences between the
5core mmc properties described by mmc.txt and the properties used by the 5core mmc properties described by mmc.txt and the properties used by the
6Samsung implmentation of the SDHCI controller. 6Samsung implmentation of the SDHCI controller.
7 7
8Note: The mmc core bindings documentation states that if none of the core
9card-detect bindings are used, then the standard sdhci card detect mechanism
10is used. The Samsung's SDHCI controller bindings extends this as listed below.
11
12[A] The property "samsung,cd-pinmux-gpio" can be used as stated in the
13 "Optional Board Specific Properties" section below.
14
15Required SoC Specific Properties: 8Required SoC Specific Properties:
16- compatible: should be one of the following 9- compatible: should be one of the following
17 - "samsung,s3c6410-sdhci": For controllers compatible with s3c6410 sdhci 10 - "samsung,s3c6410-sdhci": For controllers compatible with s3c6410 sdhci
@@ -20,18 +13,8 @@ Required SoC Specific Properties:
20 controller. 13 controller.
21 14
22Required Board Specific Properties: 15Required Board Specific Properties:
23- Samsung GPIO variant (will be completely replaced by pinctrl): 16- pinctrl-0: Should specify pin control groups used for this controller.
24 - gpios: Should specify the gpios used for clock, command and data lines. The 17- pinctrl-names: Should contain only one value - "default".
25 gpio specifier format depends on the gpio controller.
26- Pinctrl variant (preferred if available):
27 - pinctrl-0: Should specify pin control groups used for this controller.
28 - pinctrl-names: Should contain only one value - "default".
29
30Optional Board Specific Properties:
31- samsung,cd-pinmux-gpio: Specifies the card detect line that is routed
32 through a pinmux to the card-detect pin of the card slot. This property
33 should be used only if none of the mmc core card-detect properties are
34 used. Only for Samsung GPIO variant.
35 18
36Example: 19Example:
37 sdhci@12530000 { 20 sdhci@12530000 {
@@ -39,19 +22,9 @@ Example:
39 reg = <0x12530000 0x100>; 22 reg = <0x12530000 0x100>;
40 interrupts = <0 75 0>; 23 interrupts = <0 75 0>;
41 bus-width = <4>; 24 bus-width = <4>;
42 cd-gpios = <&gpk2 2 2 3 3>; 25 cd-gpios = <&gpk2 2 0>;
43
44 /* Samsung GPIO variant */
45 gpios = <&gpk2 0 2 0 3>, /* clock line */
46 <&gpk2 1 2 0 3>, /* command line */
47 <&gpk2 3 2 3 3>, /* data line 0 */
48 <&gpk2 4 2 3 3>, /* data line 1 */
49 <&gpk2 5 2 3 3>, /* data line 2 */
50 <&gpk2 6 2 3 3>; /* data line 3 */
51
52 /* Pinctrl variant */
53 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4>;
54 pinctrl-names = "default"; 26 pinctrl-names = "default";
27 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4>;
55 }; 28 };
56 29
57 Note: This example shows both SoC specific and board specific properties 30 Note: This example shows both SoC specific and board specific properties