diff options
author | Masanari Iida <standby24x7@gmail.com> | 2014-11-06 10:31:15 -0500 |
---|---|---|
committer | Jonathan Corbet <corbet@lwn.net> | 2014-11-06 15:14:11 -0500 |
commit | c0d7305cb3e5e77dba822706e21898314e893fb7 (patch) | |
tree | f29914ece580836cc47930db805c4f892fbdf75e /Documentation/vm/hugetlbpage.txt | |
parent | 747029a566e5d637ef4972afd2cb7202f7b7ca7c (diff) |
Documentation: vm: Add 1GB large page support information
This patch adds 1GB large page support information in
Documentation/vm/hugetlbpage.txt
Reference:
https://lkml.org/lkml/2014/10/31/366
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'Documentation/vm/hugetlbpage.txt')
-rw-r--r-- | Documentation/vm/hugetlbpage.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/vm/hugetlbpage.txt b/Documentation/vm/hugetlbpage.txt index b64e0af9cc56..f2d3a100fe38 100644 --- a/Documentation/vm/hugetlbpage.txt +++ b/Documentation/vm/hugetlbpage.txt | |||
@@ -1,8 +1,8 @@ | |||
1 | 1 | ||
2 | The intent of this file is to give a brief summary of hugetlbpage support in | 2 | The intent of this file is to give a brief summary of hugetlbpage support in |
3 | the Linux kernel. This support is built on top of multiple page size support | 3 | the Linux kernel. This support is built on top of multiple page size support |
4 | that is provided by most modern architectures. For example, i386 | 4 | that is provided by most modern architectures. For example, x86 CPUs normally |
5 | architecture supports 4K and 4M (2M in PAE mode) page sizes, ia64 | 5 | support 4K and 2M (1G if architecturally supported) page sizes, ia64 |
6 | architecture supports multiple page sizes 4K, 8K, 64K, 256K, 1M, 4M, 16M, | 6 | architecture supports multiple page sizes 4K, 8K, 64K, 256K, 1M, 4M, 16M, |
7 | 256M and ppc64 supports 4K and 16M. A TLB is a cache of virtual-to-physical | 7 | 256M and ppc64 supports 4K and 16M. A TLB is a cache of virtual-to-physical |
8 | translations. Typically this is a very scarce resource on processor. | 8 | translations. Typically this is a very scarce resource on processor. |