diff options
author | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-30 21:57:33 -0400 |
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committer | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-31 10:26:23 -0400 |
commit | 25985edcedea6396277003854657b5f3cb31a628 (patch) | |
tree | f026e810210a2ee7290caeb737c23cb6472b7c38 /Documentation/spi | |
parent | 6aba74f2791287ec407e0f92487a725a25908067 (diff) |
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'Documentation/spi')
-rw-r--r-- | Documentation/spi/pxa2xx | 2 | ||||
-rw-r--r-- | Documentation/spi/spi-lm70llp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx index 68a4fe3818a1..493dada57372 100644 --- a/Documentation/spi/pxa2xx +++ b/Documentation/spi/pxa2xx | |||
@@ -143,7 +143,7 @@ configured to use SSPFRM instead. | |||
143 | NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the | 143 | NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the |
144 | chipselect is dropped after each spi_transfer. Most devices need chip select | 144 | chipselect is dropped after each spi_transfer. Most devices need chip select |
145 | asserted around the complete message. Use SSPFRM as a GPIO (through cs_control) | 145 | asserted around the complete message. Use SSPFRM as a GPIO (through cs_control) |
146 | to accomodate these chips. | 146 | to accommodate these chips. |
147 | 147 | ||
148 | 148 | ||
149 | NSSP SLAVE SAMPLE | 149 | NSSP SLAVE SAMPLE |
diff --git a/Documentation/spi/spi-lm70llp b/Documentation/spi/spi-lm70llp index 34a9cfd746bd..463f6d01fa15 100644 --- a/Documentation/spi/spi-lm70llp +++ b/Documentation/spi/spi-lm70llp | |||
@@ -46,7 +46,7 @@ The hardware interfacing on the LM70 LLP eval board is as follows: | |||
46 | 46 | ||
47 | Note that since the LM70 uses a "3-wire" variant of SPI, the SI/SO pin | 47 | Note that since the LM70 uses a "3-wire" variant of SPI, the SI/SO pin |
48 | is connected to both pin D7 (as Master Out) and Select (as Master In) | 48 | is connected to both pin D7 (as Master Out) and Select (as Master In) |
49 | using an arrangment that lets either the parport or the LM70 pull the | 49 | using an arrangement that lets either the parport or the LM70 pull the |
50 | pin low. This can't be shared with true SPI devices, but other 3-wire | 50 | pin low. This can't be shared with true SPI devices, but other 3-wire |
51 | devices might share the same SI/SO pin. | 51 | devices might share the same SI/SO pin. |
52 | 52 | ||