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author | Shaohua Li <shaohua.li@intel.com> | 2007-08-17 16:43:50 -0400 |
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committer | Tony Luck <tony.luck@intel.com> | 2007-08-17 16:43:50 -0400 |
commit | b09e789c438c406bd9bcaac6f1c940a75007e59f (patch) | |
tree | 2e753d921e182653acf7badb1c6ebc0761047d7f /Documentation/rocket.txt | |
parent | e8c59c0cf9c91dccfb6367c306d753500d5a0150 (diff) |
[IA64] forbid ptrace changes psr.ri to 3
The "ri" field in the processor status register only has defined
values of 0, 1, 2. Do not let ptrace set this to 3. As with
other reserved fields in registers we silently discard the value.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'Documentation/rocket.txt')
0 files changed, 0 insertions, 0 deletions