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authorJason Jin <Jason.jin@freescale.com>2008-05-23 04:32:45 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-06-02 15:44:23 -0400
commitaee1dc73b519227084d77b0b2fc972b68b4153d8 (patch)
tree25203d16cb0c94d175ae73fc35750fc5acc11041 /Documentation/powerpc
parent0723abd0b2c9d4603b8c51d6615800c2439a328e (diff)
[POWERPC] Update booting-without-of for Freescale PCIe MSI
Binding document adding for Freescale PCIe MSI support. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation/powerpc')
-rw-r--r--Documentation/powerpc/booting-without-of.txt43
1 files changed, 42 insertions, 1 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 1d2a772506cf..c67d2f589754 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -57,7 +57,10 @@ Table of Contents
57 n) 4xx/Axon EMAC ethernet nodes 57 n) 4xx/Axon EMAC ethernet nodes
58 o) Xilinx IP cores 58 o) Xilinx IP cores
59 p) Freescale Synchronous Serial Interface 59 p) Freescale Synchronous Serial Interface
60 q) USB EHCI controllers 60 q) USB EHCI controllers
61 r) Freescale Display Interface Unit
62 s) Freescale on board FPGA
63 t) Freescael MSI interrupt controller
61 64
62 VII - Marvell Discovery mv64[345]6x System Controller chips 65 VII - Marvell Discovery mv64[345]6x System Controller chips
63 1) The /system-controller node 66 1) The /system-controller node
@@ -2870,6 +2873,44 @@ platforms are moved over to use the flattened-device-tree model.
2870 reg = <0xe8000000 32>; 2873 reg = <0xe8000000 32>;
2871 }; 2874 };
2872 2875
2876 t) Freescale MSI interrupt controller
2877
2878 Reguired properities:
2879 - compatible : compatible list, contains 2 entries,
2880 first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
2881 etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on
2882 the parent type.
2883 - reg : should contain the address and the length of the shared message
2884 interrupt register set.
2885 - msi-available-ranges: use <start count> style section to define which
2886 msi interrupt can be used in the 256 msi interrupts. This property is
2887 optional, without this, all the 256 MSI interrupts can be used.
2888 - interrupts : each one of the interrupts here is one entry per 32 MSIs,
2889 and routed to the host interrupt controller. the interrupts should
2890 be set as edge sensitive.
2891 - interrupt-parent: the phandle for the interrupt controller
2892 that services interrupts for this device. for 83xx cpu, the interrupts
2893 are routed to IPIC, and for 85xx/86xx cpu the interrupts are routed
2894 to MPIC.
2895
2896 Example
2897 msi@41600 {
2898 compatible = "fsl,mpc8610-msi", "fsl,mpic-msi";
2899 reg = <0x41600 0x80>;
2900 msi-available-ranges = <0 0x100>;
2901 interrupts = <
2902 0xe0 0
2903 0xe1 0
2904 0xe2 0
2905 0xe3 0
2906 0xe4 0
2907 0xe5 0
2908 0xe6 0
2909 0xe7 0>;
2910 interrupt-parent = <&mpic>;
2911 };
2912
2913
2873VII - Marvell Discovery mv64[345]6x System Controller chips 2914VII - Marvell Discovery mv64[345]6x System Controller chips
2874=========================================================== 2915===========================================================
2875 2916