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authorAnton Vorontsov <avorontsov@ru.mvista.com>2008-04-11 09:06:36 -0400
committerPaul Mackerras <paulus@samba.org>2008-04-16 17:46:11 -0400
commitb7ce341585a51a6d65c7a77b6918132a3b360b81 (patch)
tree4214625269c3ed6fa6a7c2cd9059a126dc4750bb /Documentation/powerpc
parent863fbf4966a7ac301a4077e4a04d73e8abfdd7b2 (diff)
[POWERPC] Implement support for the GPIO LIB API
This implements support for the GPIO LIB API. Two calls are still unimplemented though: irq_to_gpio and gpio_to_irq. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'Documentation/powerpc')
-rw-r--r--Documentation/powerpc/booting-without-of.txt52
1 files changed, 52 insertions, 0 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 2aafda9254f0..528b4822f451 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -88,6 +88,10 @@ Table of Contents
88 3) OpenPIC Interrupt Controllers 88 3) OpenPIC Interrupt Controllers
89 4) ISA Interrupt Controllers 89 4) ISA Interrupt Controllers
90 90
91 VIII - Specifying GPIO information for devices
92 1) gpios property
93 2) gpio-controller nodes
94
91 Appendix A - Sample SOC node for MPC8540 95 Appendix A - Sample SOC node for MPC8540
92 96
93 97
@@ -3431,6 +3435,54 @@ encodings listed below:
3431 2 = high to low edge sensitive type enabled 3435 2 = high to low edge sensitive type enabled
3432 3 = low to high edge sensitive type enabled 3436 3 = low to high edge sensitive type enabled
3433 3437
3438VIII - Specifying GPIO information for devices
3439==============================================
3440
34411) gpios property
3442-----------------
3443
3444Nodes that makes use of GPIOs should define them using `gpios' property,
3445format of which is: <&gpio-controller1-phandle gpio1-specifier
3446 &gpio-controller2-phandle gpio2-specifier
3447 0 /* holes are permitted, means no GPIO 3 */
3448 &gpio-controller4-phandle gpio4-specifier
3449 ...>;
3450
3451Note that gpio-specifier length is controller dependent.
3452
3453gpio-specifier may encode: bank, pin position inside the bank,
3454whether pin is open-drain and whether pin is logically inverted.
3455
3456Example of the node using GPIOs:
3457
3458 node {
3459 gpios = <&qe_pio_e 18 0>;
3460 };
3461
3462In this example gpio-specifier is "18 0" and encodes GPIO pin number,
3463and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller.
3464
34652) gpio-controller nodes
3466------------------------
3467
3468Every GPIO controller node must have #gpio-cells property defined,
3469this information will be used to translate gpio-specifiers.
3470
3471Example of two SOC GPIO banks defined as gpio-controller nodes:
3472
3473 qe_pio_a: gpio-controller@1400 {
3474 #gpio-cells = <2>;
3475 compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
3476 reg = <0x1400 0x18>;
3477 gpio-controller;
3478 };
3479
3480 qe_pio_e: gpio-controller@1460 {
3481 #gpio-cells = <2>;
3482 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
3483 reg = <0x1460 0x18>;
3484 gpio-controller;
3485 };
3434 3486
3435Appendix A - Sample SOC node for MPC8540 3487Appendix A - Sample SOC node for MPC8540
3436======================================== 3488========================================