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authorWolfram Sang <w.sang@pengutronix.de>2009-11-16 07:57:51 -0500
committerDavid S. Miller <davem@davemloft.net>2009-11-17 06:54:04 -0500
commit81593c1cea7afdcd653c77d626aa186993e39c91 (patch)
treef70cc7dd8dc272a941cd7710e7115ac20c62d692 /Documentation/powerpc
parent3f158c253214bb783e7072f6848b61c1999631e7 (diff)
net/can/mpc52xx_can: improve properties and their description
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: devicetree-discuss@ozlabs.org Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/powerpc')
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/mpc5200.txt9
1 files changed, 5 insertions, 4 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
index b151fb1ddef0..cabc780f7258 100644
--- a/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt
@@ -181,9 +181,10 @@ External interrupts:
181fsl,mpc5200-mscan nodes 181fsl,mpc5200-mscan nodes
182----------------------- 182-----------------------
183In addition to the required compatible-, reg- and interrupt-properites, you can 183In addition to the required compatible-, reg- and interrupt-properites, you can
184also specify which clock shall be used for the bus: 184also specify which clock source shall be used for the controller:
185 185
186- fsl,mscan-clk-src - a string describing the clock source. Valid values 186- fsl,mscan-clock-source- a string describing the clock source. Valid values
187 are "ip" for IP_CLK and "sys" for SYS_XTAL. 187 are: "ip" for ip bus clock
188 "sys" is the default in case the property is not 188 "ref" for reference clock (XTAL)
189 "ref" is default in case this property is not
189 present. 190 present.