Merge branch 'linus' into release

Conflicts:
	arch/x86/kernel/cpu/cpufreq/longhaul.c

Signed-off-by: Len Brown <len.brown@intel.com>

6 files changed, 111 insertions, 46 deletions

diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt
index 6c238f59b2a9..249db3a15d15 100644
--- a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt
@@ -1,6 +1,6 @@
 * Uploaded QE firmware
 
-      If a new firwmare has been uploaded to the QE (usually by the
+      If a new firmware has been uploaded to the QE (usually by the
       boot loader), then a 'firmware' child node should be added to the QE
       node.  This node provides information on the uploaded firmware that
       device drivers may need.
diff --git a/Documentation/powerpc/dts-bindings/fsl/dma.txt b/Documentation/powerpc/dts-bindings/fsl/dma.txt
index cc453110fc46..0732cdd05ba1 100644
--- a/Documentation/powerpc/dts-bindings/fsl/dma.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/dma.txt
@@ -35,30 +35,30 @@ Example:
                 #address-cells = <1>;
                 #size-cells = <1>;
                 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
-                reg = <82a8 4>;
-                ranges = <0 8100 1a4>;
+                reg = <0x82a8 4>;
+                ranges = <0 0x8100 0x1a4>;
                 interrupt-parent = <&ipic>;
-                interrupts = <47 8>;
+                interrupts = <71 8>;
                 cell-index = <0>;
                 dma-channel@0 {
                         compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
                         cell-index = <0>;
-                        reg = <0 80>;
+                        reg = <0 0x80>;
                 };
                 dma-channel@80 {
                         compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
                         cell-index = <1>;
-                        reg = <80 80>;
+                        reg = <0x80 0x80>;
                 };
                 dma-channel@100 {
                         compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
                         cell-index = <2>;
-                        reg = <100 80>;
+                        reg = <0x100 0x80>;
                 };
                 dma-channel@180 {
                         compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
                         cell-index = <3>;
-                        reg = <180 80>;
+                        reg = <0x180 0x80>;
                 };
         };
 
@@ -93,36 +93,36 @@ Example:
                 #address-cells = <1>;
                 #size-cells = <1>;
                 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
-                reg = <21300 4>;
-                ranges = <0 21100 200>;
+                reg = <0x21300 4>;
+                ranges = <0 0x21100 0x200>;
                 cell-index = <0>;
                 dma-channel@0 {
                         compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
-                        reg = <0 80>;
+                        reg = <0 0x80>;
                         cell-index = <0>;
                         interrupt-parent = <&mpic>;
-                        interrupts = <14 2>;
+                        interrupts = <20 2>;
                 };
                 dma-channel@80 {
                         compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
-                        reg = <80 80>;
+                        reg = <0x80 0x80>;
                         cell-index = <1>;
                         interrupt-parent = <&mpic>;
-                        interrupts = <15 2>;
+                        interrupts = <21 2>;
                 };
                 dma-channel@100 {
                         compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
-                        reg = <100 80>;
+                        reg = <0x100 0x80>;
                         cell-index = <2>;
                         interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
+                        interrupts = <22 2>;
                 };
                 dma-channel@180 {
                         compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
-                        reg = <180 80>;
+                        reg = <0x180 0x80>;
                         cell-index = <3>;
                         interrupt-parent = <&mpic>;
-                        interrupts = <17 2>;
+                        interrupts = <23 2>;
                 };
         };
 
diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
new file mode 100644
index 000000000000..600846557763
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
@@ -0,0 +1,24 @@
+* Freescale Enhanced Secure Digital Host Controller (eSDHC)
+
+The Enhanced Secure Digital Host Controller provides an interface
+for MMC, SD, and SDIO types of memory cards.
+
+Required properties:
+  - compatible : should be
+    "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
+    "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
+  - reg : should contain eSDHC registers location and length.
+  - interrupts : should contain eSDHC interrupt.
+  - interrupt-parent : interrupt source phandle.
+  - clock-frequency : specifies eSDHC base clock frequency.
+
+Example:
+
+sdhci@2e000 {
+        compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+        reg = <0x2e000 0x1000>;
+        interrupts = <42 0x8>;
+        interrupt-parent = <&ipic>;
+        /* Filled in by U-Boot */
+        clock-frequency = <0>;
+};
diff --git a/Documentation/powerpc/dts-bindings/fsl/ssi.txt b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
index a2d963998a65..5ff76c9c57d2 100644
--- a/Documentation/powerpc/dts-bindings/fsl/ssi.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
@@ -4,44 +4,56 @@ The SSI is a serial device that communicates with audio codecs.  It can
 be programmed in AC97, I2S, left-justified, or right-justified modes.
 
 Required properties:
-- compatible      : compatible list, containing "fsl,ssi"
-- cell-index      : the SSI, <0> = SSI1, <1> = SSI2, and so on
-- reg             : offset and length of the register set for the device
-- interrupts      : <a b> where a is the interrupt number and b is a
-                     field that represents an encoding of the sense and
-                    level information for the interrupt.  This should be
-                    encoded based on the information in section 2)
-                    depending on the type of interrupt controller you
-                    have.
-- interrupt-parent : the phandle for the interrupt controller that
-                     services interrupts for this device.
-- fsl,mode        : the operating mode for the SSI interface
-                    "i2s-slave" - I2S mode, SSI is clock slave
-                    "i2s-master" - I2S mode, SSI is clock master
-                    "lj-slave" - left-justified mode, SSI is clock slave
-                    "lj-master" - l.j. mode, SSI is clock master
-                    "rj-slave" - right-justified mode, SSI is clock slave
-                    "rj-master" - r.j., SSI is clock master
-                    "ac97-slave" - AC97 mode, SSI is clock slave
-                    "ac97-master" - AC97 mode, SSI is clock master
-- fsl,playback-dma: phandle to a node for the DMA channel to use for
+- compatible:       Compatible list, contains "fsl,ssi".
+- cell-index:       The SSI, <0> = SSI1, <1> = SSI2, and so on.
+- reg:              Offset and length of the register set for the device.
+- interrupts:       <a b> where a is the interrupt number and b is a
+                    field that represents an encoding of the sense and
+                    level information for the interrupt.  This should be
+                    encoded based on the information in section 2)
+                    depending on the type of interrupt controller you
+                    have.
+- interrupt-parent: The phandle for the interrupt controller that
+                    services interrupts for this device.
+- fsl,mode:         The operating mode for the SSI interface.
+                    "i2s-slave" - I2S mode, SSI is clock slave
+                    "i2s-master" - I2S mode, SSI is clock master
+                    "lj-slave" - left-justified mode, SSI is clock slave
+                    "lj-master" - l.j. mode, SSI is clock master
+                    "rj-slave" - right-justified mode, SSI is clock slave
+                    "rj-master" - r.j., SSI is clock master
+                    "ac97-slave" - AC97 mode, SSI is clock slave
+                    "ac97-master" - AC97 mode, SSI is clock master
+- fsl,playback-dma: Phandle to a node for the DMA channel to use for
                     playback of audio.  This is typically dictated by SOC
                     design.  See the notes below.
-- fsl,capture-dma:  phandle to a node for the DMA channel to use for
+- fsl,capture-dma:  Phandle to a node for the DMA channel to use for
                     capture (recording) of audio.  This is typically dictated
                     by SOC design.  See the notes below.
+- fsl,fifo-depth:   The number of elements in the transmit and receive FIFOs.
+                    This number is the maximum allowed value for SFCSR[TFWM0].
+- fsl,ssi-asynchronous:
+                    If specified, the SSI is to be programmed in asynchronous
+                    mode.  In this mode, pins SRCK, STCK, SRFS, and STFS must
+                    all be connected to valid signals.  In synchronous mode,
+                    SRCK and SRFS are ignored.  Asynchronous mode allows
+                    playback and capture to use different sample sizes and
+                    sample rates.  Some drivers may require that SRCK and STCK
+                    be connected together, and SRFS and STFS be connected
+                    together.  This would still allow different sample sizes,
+                    but not different sample rates.
 
 Optional properties:
-- codec-handle    : phandle to a 'codec' node that defines an audio
-                    codec connected to this SSI.  This node is typically
-                    a child of an I2C or other control node.
+- codec-handle:     Phandle to a 'codec' node that defines an audio
+                    codec connected to this SSI.  This node is typically
+                    a child of an I2C or other control node.
 
 Child 'codec' node required properties:
-- compatible      : compatible list, contains the name of the codec
+- compatible:       Compatible list, contains the name of the codec
 
 Child 'codec' node optional properties:
-- clock-frequency  : The frequency of the input clock, which typically
-                     comes from an on-board dedicated oscillator.
+- clock-frequency:  The frequency of the input clock, which typically comes
+                    from an on-board dedicated oscillator.
 
 Notes on fsl,playback-dma and fsl,capture-dma:
 
diff --git a/Documentation/powerpc/dts-bindings/fsl/tsec.txt b/Documentation/powerpc/dts-bindings/fsl/tsec.txt
index 7fa4b27574b5..edb7ae19e868 100644
--- a/Documentation/powerpc/dts-bindings/fsl/tsec.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/tsec.txt
@@ -56,6 +56,12 @@ Properties:
     hardware.
   - fsl,magic-packet : If present, indicates that the hardware supports
     waking up via magic packet.
+  - bd-stash : If present, indicates that the hardware supports stashing
+    buffer descriptors in the L2.
+  - rx-stash-len : Denotes the number of bytes of a received buffer to stash
+    in the L2.
+  - rx-stash-idx : Denotes the index of the first byte from the received
+    buffer to stash in the L2.
 
 Example:
         ethernet@24000 {
diff --git a/Documentation/powerpc/dts-bindings/mmc-spi-slot.txt b/Documentation/powerpc/dts-bindings/mmc-spi-slot.txt
new file mode 100644
index 000000000000..c39ac2891951
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/mmc-spi-slot.txt
@@ -0,0 +1,23 @@
+MMC/SD/SDIO slot directly connected to a SPI bus
+
+Required properties:
+- compatible : should be "mmc-spi-slot".
+- reg : should specify SPI address (chip-select number).
+- spi-max-frequency : maximum frequency for this device (Hz).
+- voltage-ranges : two cells are required, first cell specifies minimum
+  slot voltage (mV), second cell specifies maximum slot voltage (mV).
+  Several ranges could be specified.
+- gpios : (optional) may specify GPIOs in this order: Card-Detect GPIO,
+  Write-Protect GPIO.
+
+Example:
+
+        mmc-slot@0 {
+                compatible = "fsl,mpc8323rdb-mmc-slot",
+                             "mmc-spi-slot";
+                reg = <0>;
+                gpios = <&qe_pio_d 14 1
+                         &qe_pio_d 15 0>;
+                voltage-ranges = <3300 3300>;
+                spi-max-frequency = <50000000>;
+        };