Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (72 commits)
  powerpc/pseries: Fix build of topology stuff without CONFIG_NUMA
  powerpc/pseries: Fix VPHN build errors on non-SMP systems
  powerpc/83xx: add mpc8308_p1m DMA controller device-tree node
  powerpc/83xx: add DMA controller to mpc8308 device-tree node
  powerpc/512x: try to free dma descriptors in case of allocation failure
  powerpc/512x: add MPC8308 dma support
  powerpc/512x: fix the hanged dma transfer issue
  powerpc/512x: scatter/gather dma fix
  powerpc/powermac: Make auto-loading of therm_pm72 possible
  of/address: Use propper endianess in get_flags
  powerpc/pci: Use printf extension %pR for struct resource
  powerpc: Remove unnecessary casts of void ptr
  powerpc: Disable VPHN polling during a suspend operation
  powerpc/pseries: Poll VPA for topology changes and update NUMA maps
  powerpc: iommu: Add device name to iommu error printks
  powerpc: Record vma->phys_addr in ioremap()
  powerpc: Update compat_arch_ptrace
  powerpc: Fix PPC_PTRACE_SETHWDEBUG on PPC_BOOK3S
  powerpc/time: printk time stamp init not correct
  powerpc: Minor cleanups for machdep.h
  ...

1 files changed, 52 insertions, 0 deletions

diff --git a/Documentation/powerpc/dts-bindings/4xx/cpm.txt b/Documentation/powerpc/dts-bindings/4xx/cpm.txt
new file mode 100644
index 000000000000..ee459806d35e
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/4xx/cpm.txt
@@ -0,0 +1,52 @@
+PPC4xx Clock Power Management (CPM) node
+
+Required properties:
+        - compatible            : compatible list, currently only "ibm,cpm"
+        - dcr-access-method     : "native"
+        - dcr-reg               : < DCR register range >
+
+Optional properties:
+        - er-offset             : All 4xx SoCs with a CPM controller have
+                                  one of two different order for the CPM
+                                  registers. Some have the CPM registers
+                                  in the following order (ER,FR,SR). The
+                                  others have them in the following order
+                                  (SR,ER,FR). For the second case set
+                                  er-offset = <1>.
+        - unused-units          : specifier consist of one cell. For each
+                                  bit in the cell, the corresponding bit
+                                  in CPM will be set to turn off unused
+                                  devices.
+        - idle-doze             : specifier consist of one cell. For each
+                                  bit in the cell, the corresponding bit
+                                  in CPM will be set to turn off unused
+                                  devices. This is usually just CPM[CPU].
+        - standby               : specifier consist of one cell. For each
+                                  bit in the cell, the corresponding bit
+                                  in CPM will be set on standby and
+                                  restored on resume.
+        - suspend               : specifier consist of one cell. For each
+                                  bit in the cell, the corresponding bit
+                                  in CPM will be set on suspend (mem) and
+                                  restored on resume. Note, for standby
+                                  and suspend the corresponding bits can
+                                  be different or the same. Usually for
+                                  standby only class 2 and 3 units are set.
+                                  However, the interface does not care.
+                                  If they are the same, the additional
+                                  power saving will be seeing if support
+                                  is available to put the DDR in self
+                                  refresh mode and any additional power
+                                  saving techniques for the specific SoC.
+
+Example:
+        CPM0: cpm {
+                compatible = "ibm,cpm";
+                dcr-access-method = "native";
+                dcr-reg = <0x160 0x003>;
+                er-offset = <0>;
+                unused-units = <0x00000100>;
+                idle-doze = <0x02000000>;
+                standby = <0xfeff0000>;
+                suspend = <0xfeff791d>;
+};