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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-21 14:17:05 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-21 14:17:05 -0400 |
commit | 79c4581262e225a7c96d88b632b05ab3b5e9a52c (patch) | |
tree | 8ef030c74ab7e0d0df27cf86195f915efd2832f7 /Documentation/powerpc/dts-bindings | |
parent | 59534f7298c5e28aaa64e6ed550e247f64ee72ae (diff) | |
parent | 99ec28f183daa450faa7bdad6f932364ae325648 (diff) |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (92 commits)
powerpc: Remove unused 'protect4gb' boot parameter
powerpc: Build-in e1000e for pseries & ppc64_defconfig
powerpc/pseries: Make request_ras_irqs() available to other pseries code
powerpc/numa: Use ibm,architecture-vec-5 to detect form 1 affinity
powerpc/numa: Set a smaller value for RECLAIM_DISTANCE to enable zone reclaim
powerpc: Use smt_snooze_delay=-1 to always busy loop
powerpc: Remove check of ibm,smt-snooze-delay OF property
powerpc/kdump: Fix race in kdump shutdown
powerpc/kexec: Fix race in kexec shutdown
powerpc/kexec: Speedup kexec hash PTE tear down
powerpc/pseries: Add hcall to read 4 ptes at a time in real mode
powerpc: Use more accurate limit for first segment memory allocations
powerpc/kdump: Use chip->shutdown to disable IRQs
powerpc/kdump: CPUs assume the context of the oopsing CPU
powerpc/crashdump: Do not fail on NULL pointer dereferencing
powerpc/eeh: Fix oops when probing in early boot
powerpc/pci: Check devices status property when scanning OF tree
powerpc/vio: Switch VIO Bus PM to use generic helpers
powerpc: Avoid bad relocations in iSeries code
powerpc: Use common cpu_die (fixes SMP+SUSPEND build)
...
Diffstat (limited to 'Documentation/powerpc/dts-bindings')
-rw-r--r-- | Documentation/powerpc/dts-bindings/4xx/reboot.txt | 18 | ||||
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt | 22 |
2 files changed, 39 insertions, 1 deletions
diff --git a/Documentation/powerpc/dts-bindings/4xx/reboot.txt b/Documentation/powerpc/dts-bindings/4xx/reboot.txt new file mode 100644 index 000000000000..d7217260589c --- /dev/null +++ b/Documentation/powerpc/dts-bindings/4xx/reboot.txt | |||
@@ -0,0 +1,18 @@ | |||
1 | Reboot property to control system reboot on PPC4xx systems: | ||
2 | |||
3 | By setting "reset_type" to one of the following values, the default | ||
4 | software reset mechanism may be overidden. Here the possible values of | ||
5 | "reset_type": | ||
6 | |||
7 | 1 - PPC4xx core reset | ||
8 | 2 - PPC4xx chip reset | ||
9 | 3 - PPC4xx system reset (default) | ||
10 | |||
11 | Example: | ||
12 | |||
13 | cpu@0 { | ||
14 | device_type = "cpu"; | ||
15 | model = "PowerPC,440SPe"; | ||
16 | ... | ||
17 | reset-type = <2>; /* Use chip-reset */ | ||
18 | }; | ||
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt index d015dcec4011..b0019eb5330e 100644 --- a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt +++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt | |||
@@ -11,7 +11,7 @@ Required properties: | |||
11 | 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx. | 11 | 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx. |
12 | - #gpio-cells : Should be two. The first cell is the pin number and the | 12 | - #gpio-cells : Should be two. The first cell is the pin number and the |
13 | second cell is used to specify optional parameters (currently unused). | 13 | second cell is used to specify optional parameters (currently unused). |
14 | - interrupts : Interrupt mapping for GPIO IRQ (currently unused). | 14 | - interrupts : Interrupt mapping for GPIO IRQ. |
15 | - interrupt-parent : Phandle for the interrupt controller that | 15 | - interrupt-parent : Phandle for the interrupt controller that |
16 | services interrupts for this device. | 16 | services interrupts for this device. |
17 | - gpio-controller : Marks the port as GPIO controller. | 17 | - gpio-controller : Marks the port as GPIO controller. |
@@ -38,3 +38,23 @@ Example of gpio-controller nodes for a MPC8347 SoC: | |||
38 | 38 | ||
39 | See booting-without-of.txt for details of how to specify GPIO | 39 | See booting-without-of.txt for details of how to specify GPIO |
40 | information for devices. | 40 | information for devices. |
41 | |||
42 | To use GPIO pins as interrupt sources for peripherals, specify the | ||
43 | GPIO controller as the interrupt parent and define GPIO number + | ||
44 | trigger mode using the interrupts property, which is defined like | ||
45 | this: | ||
46 | |||
47 | interrupts = <number trigger>, where: | ||
48 | - number: GPIO pin (0..31) | ||
49 | - trigger: trigger mode: | ||
50 | 2 = trigger on falling edge | ||
51 | 3 = trigger on both edges | ||
52 | |||
53 | Example of device using this is: | ||
54 | |||
55 | funkyfpga@0 { | ||
56 | compatible = "funky-fpga"; | ||
57 | ... | ||
58 | interrupts = <4 3>; | ||
59 | interrupt-parent = <&gpio1>; | ||
60 | }; | ||