diff options
author | Peter Korsgaard <jacmet@sunsite.dk> | 2008-09-23 11:35:38 -0400 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2008-09-23 11:41:16 -0400 |
commit | 1e16dfc1baa745dd89b95f6e33e4142df6218066 (patch) | |
tree | eabec7954c03bde518f32f40fe3c544803b74497 /Documentation/powerpc/dts-bindings/fsl | |
parent | 1afb7f809bfb8fad9eec9419f3dfd75cee746ebd (diff) |
powerpc: gpio driver for mpc8349/8572/8610 and compatible
Structured similar to the existing QE GPIO support.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation/powerpc/dts-bindings/fsl')
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt new file mode 100644 index 000000000000..d015dcec4011 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/8xxx_gpio.txt | |||
@@ -0,0 +1,40 @@ | |||
1 | GPIO controllers on MPC8xxx SoCs | ||
2 | |||
3 | This is for the non-QE/CPM/GUTs GPIO controllers as found on | ||
4 | 8349, 8572, 8610 and compatible. | ||
5 | |||
6 | Every GPIO controller node must have #gpio-cells property defined, | ||
7 | this information will be used to translate gpio-specifiers. | ||
8 | |||
9 | Required properties: | ||
10 | - compatible : "fsl,<CHIP>-gpio" followed by "fsl,mpc8349-gpio" for | ||
11 | 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx. | ||
12 | - #gpio-cells : Should be two. The first cell is the pin number and the | ||
13 | second cell is used to specify optional parameters (currently unused). | ||
14 | - interrupts : Interrupt mapping for GPIO IRQ (currently unused). | ||
15 | - interrupt-parent : Phandle for the interrupt controller that | ||
16 | services interrupts for this device. | ||
17 | - gpio-controller : Marks the port as GPIO controller. | ||
18 | |||
19 | Example of gpio-controller nodes for a MPC8347 SoC: | ||
20 | |||
21 | gpio1: gpio-controller@c00 { | ||
22 | #gpio-cells = <2>; | ||
23 | compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; | ||
24 | reg = <0xc00 0x100>; | ||
25 | interrupts = <74 0x8>; | ||
26 | interrupt-parent = <&ipic>; | ||
27 | gpio-controller; | ||
28 | }; | ||
29 | |||
30 | gpio2: gpio-controller@d00 { | ||
31 | #gpio-cells = <2>; | ||
32 | compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; | ||
33 | reg = <0xd00 0x100>; | ||
34 | interrupts = <75 0x8>; | ||
35 | interrupt-parent = <&ipic>; | ||
36 | gpio-controller; | ||
37 | }; | ||
38 | |||
39 | See booting-without-of.txt for details of how to specify GPIO | ||
40 | information for devices. | ||