powerpc: add fsl,fifo-depth property to Freescale SSI device nodes

The Freescale Serial Synchronous Interface (SSI) is an audio device present on
some Freescale SOCs.  Various implementations of the SSI have a different
transmit and receive FIFO depth, but are otherwise identical.  To support
these variations, add a new property fsl,fifo-depth to the SSI node that
specifies the depth of the FIFOs.

Also update the MPC8610 HPCD device tree with this property.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 2 insertions, 0 deletions

diff --git a/Documentation/powerpc/dts-bindings/fsl/ssi.txt b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
index a2d963998a65..731332288931 100644
--- a/Documentation/powerpc/dts-bindings/fsl/ssi.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
@@ -30,6 +30,8 @@ Required properties:
 - fsl,capture-dma:  phandle to a node for the DMA channel to use for
                     capture (recording) of audio.  This is typically dictated
                     by SOC design.  See the notes below.
+- fsl,fifo-depth:   the number of elements in the transmit and receive FIFOs.
+                    This number is the maximum allowed value for SFCSR[TFWM0].
 
 Optional properties:
 - codec-handle    : phandle to a 'codec' node that defines an audio