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authorMichael Ellerman <mpe@ellerman.id.au>2014-05-26 07:44:25 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-06-04 23:20:01 -0400
commit91a6151be2a936e87ce422fcd9262377ad9ed91c (patch)
tree1f525f0eea01388771a4a6bfaa3360b9bad80b88 /Documentation/powerpc/cpu_families.txt
parent736256e4f1bc50bb8198c9b61dffd5fd0de17477 (diff)
powerpc: Add cpu family documentation
This patch adds some documentation on the different cpu families supported by arch/powerpc. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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1CPU Families
2============
3
4This document tries to summarise some of the different cpu families that exist
5and are supported by arch/powerpc.
6
7
8Book3S (aka sPAPR)
9------------------
10
11 - Hash MMU
12 - Mix of 32 & 64 bit
13
14 +--------------+ +----------------+
15 | Old POWER | --------------> | RS64 (threads) |
16 +--------------+ +----------------+
17 |
18 |
19 v
20 +--------------+ +----------------+ +------+
21 | 601 | --------------> | 603 | ---> | e300 |
22 +--------------+ +----------------+ +------+
23 | |
24 | |
25 v v
26 +--------------+ +----------------+ +-------+
27 | 604 | | 750 (G3) | ---> | 750CX |
28 +--------------+ +----------------+ +-------+
29 | | |
30 | | |
31 v v v
32 +--------------+ +----------------+ +-------+
33 | 620 (64 bit) | | 7400 | | 750CL |
34 +--------------+ +----------------+ +-------+
35 | | |
36 | | |
37 v v v
38 +--------------+ +----------------+ +-------+
39 | POWER3/630 | | 7410 | | 750FX |
40 +--------------+ +----------------+ +-------+
41 | |
42 | |
43 v v
44 +--------------+ +----------------+
45 | POWER3+ | | 7450 |
46 +--------------+ +----------------+
47 | |
48 | |
49 v v
50 +--------------+ +----------------+
51 | POWER4 | | 7455 |
52 +--------------+ +----------------+
53 | |
54 | |
55 v v
56 +--------------+ +-------+ +----------------+
57 | POWER4+ | --> | 970 | | 7447 |
58 +--------------+ +-------+ +----------------+
59 | | |
60 | | |
61 v v v
62 +--------------+ +-------+ +----------------+
63 | POWER5 | | 970FX | | 7448 |
64 +--------------+ +-------+ +----------------+
65 | | |
66 | | |
67 v v v
68 +--------------+ +-------+ +----------------+
69 | POWER5+ | | 970MP | | e600 |
70 +--------------+ +-------+ +----------------+
71 |
72 |
73 v
74 +--------------+
75 | POWER5++ |
76 +--------------+
77 |
78 |
79 v
80 +--------------+ +-------+
81 | POWER6 | <-?-> | Cell |
82 +--------------+ +-------+
83 |
84 |
85 v
86 +--------------+
87 | POWER7 |
88 +--------------+
89 |
90 |
91 v
92 +--------------+
93 | POWER7+ |
94 +--------------+
95 |
96 |
97 v
98 +--------------+
99 | POWER8 |
100 +--------------+
101
102
103 +---------------+
104 | PA6T (64 bit) |
105 +---------------+
106
107
108IBM BookE
109---------
110
111 - Software loaded TLB.
112 - All 32 bit
113
114 +--------------+
115 | 401 |
116 +--------------+
117 |
118 |
119 v
120 +--------------+
121 | 403 |
122 +--------------+
123 |
124 |
125 v
126 +--------------+
127 | 405 |
128 +--------------+
129 |
130 |
131 v
132 +--------------+
133 | 440 |
134 +--------------+
135 |
136 |
137 v
138 +--------------+ +----------------+
139 | 450 | --> | BG/P |
140 +--------------+ +----------------+
141 |
142 |
143 v
144 +--------------+
145 | 460 |
146 +--------------+
147 |
148 |
149 v
150 +--------------+
151 | 476 |
152 +--------------+
153
154
155Motorola/Freescale 8xx
156----------------------
157
158 - Software loaded with hardware assist.
159 - All 32 bit
160
161 +-------------+
162 | MPC8xx Core |
163 +-------------+
164
165
166Freescale BookE
167---------------
168
169 - Software loaded TLB.
170 - e6500 adds HW loaded indirect TLB entries.
171 - Mix of 32 & 64 bit
172
173 +--------------+
174 | e200 |
175 +--------------+
176
177
178 +--------------------------------+
179 | e500 |
180 +--------------------------------+
181 |
182 |
183 v
184 +--------------------------------+
185 | e500v2 |
186 +--------------------------------+
187 |
188 |
189 v
190 +--------------------------------+
191 | e500mc (Book3e) |
192 +--------------------------------+
193 |
194 |
195 v
196 +--------------------------------+
197 | e5500 (64 bit) |
198 +--------------------------------+
199 |
200 |
201 v
202 +--------------------------------+
203 | e6500 (HW TLB) (Multithreaded) |
204 +--------------------------------+
205
206
207IBM A2 core
208-----------
209
210 - Book3E, software loaded TLB + HW loaded indirect TLB entries.
211 - 64 bit
212
213 +--------------+ +----------------+
214 | A2 core | --> | WSP |
215 +--------------+ +----------------+
216 |
217 |
218 v
219 +--------------+
220 | BG/Q |
221 +--------------+