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authorDale Farnsworth <dale@farnsworth.org>2008-04-07 18:12:07 -0400
committerPaul Mackerras <paulus@samba.org>2008-04-15 07:21:24 -0400
commitf5412c4980a9fbf9540078577747d7e098829e75 (patch)
tree83d01082bed9b0e7693b92fb271fdcf50ecd2309 /Documentation/powerpc/booting-without-of.txt
parenta0916bd64a0e6636f0161480e04057c89e90c5da (diff)
[POWERPC] Document the mv64x60 device tree bindings
Add the device tree bindings for the Marvell mv64x60 series of system controller chips in booting-without-of.text. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'Documentation/powerpc/booting-without-of.txt')
-rw-r--r--Documentation/powerpc/booting-without-of.txt548
1 files changed, 545 insertions, 3 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 1df9d4cfc0e6..2aafda9254f0 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -59,7 +59,30 @@ Table of Contents
59 p) Freescale Synchronous Serial Interface 59 p) Freescale Synchronous Serial Interface
60 q) USB EHCI controllers 60 q) USB EHCI controllers
61 61
62 VII - Specifying interrupt information for devices 62 VII - Marvell Discovery mv64[345]6x System Controller chips
63 1) The /system-controller node
64 2) Child nodes of /system-controller
65 a) Marvell Discovery MDIO bus
66 b) Marvell Discovery ethernet controller
67 c) Marvell Discovery PHY nodes
68 d) Marvell Discovery SDMA nodes
69 e) Marvell Discovery BRG nodes
70 f) Marvell Discovery CUNIT nodes
71 g) Marvell Discovery MPSCROUTING nodes
72 h) Marvell Discovery MPSCINTR nodes
73 i) Marvell Discovery MPSC nodes
74 j) Marvell Discovery Watch Dog Timer nodes
75 k) Marvell Discovery I2C nodes
76 l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
77 m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
78 n) Marvell Discovery GPP (General Purpose Pins) nodes
79 o) Marvell Discovery PCI host bridge node
80 p) Marvell Discovery CPU Error nodes
81 q) Marvell Discovery SRAM Controller nodes
82 r) Marvell Discovery PCI Error Handler nodes
83 s) Marvell Discovery Memory Controller nodes
84
85 VIII - Specifying interrupt information for devices
63 1) interrupts property 86 1) interrupts property
64 2) interrupt-parent property 87 2) interrupt-parent property
65 3) OpenPIC Interrupt Controllers 88 3) OpenPIC Interrupt Controllers
@@ -2801,9 +2824,528 @@ platforms are moved over to use the flattened-device-tree model.
2801 }; 2824 };
2802 2825
2803 2826
2804 More devices will be defined as this spec matures. 2827VII - Marvell Discovery mv64[345]6x System Controller chips
2828===========================================================
2805 2829
2806VII - Specifying interrupt information for devices 2830The Marvell mv64[345]60 series of system controller chips contain
2831many of the peripherals needed to implement a complete computer
2832system. In this section, we define device tree nodes to describe
2833the system controller chip itself and each of the peripherals
2834which it contains. Compatible string values for each node are
2835prefixed with the string "marvell,", for Marvell Technology Group Ltd.
2836
28371) The /system-controller node
2838
2839 This node is used to represent the system-controller and must be
2840 present when the system uses a system contller chip. The top-level
2841 system-controller node contains information that is global to all
2842 devices within the system controller chip. The node name begins
2843 with "system-controller" followed by the unit address, which is
2844 the base address of the memory-mapped register set for the system
2845 controller chip.
2846
2847 Required properties:
2848
2849 - ranges : Describes the translation of system controller addresses
2850 for memory mapped registers.
2851 - clock-frequency: Contains the main clock frequency for the system
2852 controller chip.
2853 - reg : This property defines the address and size of the
2854 memory-mapped registers contained within the system controller
2855 chip. The address specified in the "reg" property should match
2856 the unit address of the system-controller node.
2857 - #address-cells : Address representation for system controller
2858 devices. This field represents the number of cells needed to
2859 represent the address of the memory-mapped registers of devices
2860 within the system controller chip.
2861 - #size-cells : Size representation for for the memory-mapped
2862 registers within the system controller chip.
2863 - #interrupt-cells : Defines the width of cells used to represent
2864 interrupts.
2865
2866 Optional properties:
2867
2868 - model : The specific model of the system controller chip. Such
2869 as, "mv64360", "mv64460", or "mv64560".
2870 - compatible : A string identifying the compatibility identifiers
2871 of the system controller chip.
2872
2873 The system-controller node contains child nodes for each system
2874 controller device that the platform uses. Nodes should not be created
2875 for devices which exist on the system controller chip but are not used
2876
2877 Example Marvell Discovery mv64360 system-controller node:
2878
2879 system-controller@f1000000 { /* Marvell Discovery mv64360 */
2880 #address-cells = <1>;
2881 #size-cells = <1>;
2882 model = "mv64360"; /* Default */
2883 compatible = "marvell,mv64360";
2884 clock-frequency = <133333333>;
2885 reg = <0xf1000000 0x10000>;
2886 virtual-reg = <0xf1000000>;
2887 ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
2888 0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
2889 0xa0000000 0xa0000000 0x4000000 /* User FLASH */
2890 0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
2891 0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
2892
2893 [ child node definitions... ]
2894 }
2895
28962) Child nodes of /system-controller
2897
2898 a) Marvell Discovery MDIO bus
2899
2900 The MDIO is a bus to which the PHY devices are connected. For each
2901 device that exists on this bus, a child node should be created. See
2902 the definition of the PHY node below for an example of how to define
2903 a PHY.
2904
2905 Required properties:
2906 - #address-cells : Should be <1>
2907 - #size-cells : Should be <0>
2908 - device_type : Should be "mdio"
2909 - compatible : Should be "marvell,mv64360-mdio"
2910
2911 Example:
2912
2913 mdio {
2914 #address-cells = <1>;
2915 #size-cells = <0>;
2916 device_type = "mdio";
2917 compatible = "marvell,mv64360-mdio";
2918
2919 ethernet-phy@0 {
2920 ......
2921 };
2922 };
2923
2924
2925 b) Marvell Discovery ethernet controller
2926
2927 The Discover ethernet controller is described with two levels
2928 of nodes. The first level describes an ethernet silicon block
2929 and the second level describes up to 3 ethernet nodes within
2930 that block. The reason for the multiple levels is that the
2931 registers for the node are interleaved within a single set
2932 of registers. The "ethernet-block" level describes the
2933 shared register set, and the "ethernet" nodes describe ethernet
2934 port-specific properties.
2935
2936 Ethernet block node
2937
2938 Required properties:
2939 - #address-cells : <1>
2940 - #size-cells : <0>
2941 - compatible : "marvell,mv64360-eth-block"
2942 - reg : Offset and length of the register set for this block
2943
2944 Example Discovery Ethernet block node:
2945 ethernet-block@2000 {
2946 #address-cells = <1>;
2947 #size-cells = <0>;
2948 compatible = "marvell,mv64360-eth-block";
2949 reg = <0x2000 0x2000>;
2950 ethernet@0 {
2951 .......
2952 };
2953 };
2954
2955 Ethernet port node
2956
2957 Required properties:
2958 - device_type : Should be "network".
2959 - compatible : Should be "marvell,mv64360-eth".
2960 - reg : Should be <0>, <1>, or <2>, according to which registers
2961 within the silicon block the device uses.
2962 - interrupts : <a> where a is the interrupt number for the port.
2963 - interrupt-parent : the phandle for the interrupt controller
2964 that services interrupts for this device.
2965 - phy : the phandle for the PHY connected to this ethernet
2966 controller.
2967 - local-mac-address : 6 bytes, MAC address
2968
2969 Example Discovery Ethernet port node:
2970 ethernet@0 {
2971 device_type = "network";
2972 compatible = "marvell,mv64360-eth";
2973 reg = <0>;
2974 interrupts = <32>;
2975 interrupt-parent = <&PIC>;
2976 phy = <&PHY0>;
2977 local-mac-address = [ 00 00 00 00 00 00 ];
2978 };
2979
2980
2981
2982 c) Marvell Discovery PHY nodes
2983
2984 Required properties:
2985 - device_type : Should be "ethernet-phy"
2986 - interrupts : <a> where a is the interrupt number for this phy.
2987 - interrupt-parent : the phandle for the interrupt controller that
2988 services interrupts for this device.
2989 - reg : The ID number for the phy, usually a small integer
2990
2991 Example Discovery PHY node:
2992 ethernet-phy@1 {
2993 device_type = "ethernet-phy";
2994 compatible = "broadcom,bcm5421";
2995 interrupts = <76>; /* GPP 12 */
2996 interrupt-parent = <&PIC>;
2997 reg = <1>;
2998 };
2999
3000
3001 d) Marvell Discovery SDMA nodes
3002
3003 Represent DMA hardware associated with the MPSC (multiprotocol
3004 serial controllers).
3005
3006 Required properties:
3007 - compatible : "marvell,mv64360-sdma"
3008 - reg : Offset and length of the register set for this device
3009 - interrupts : <a> where a is the interrupt number for the DMA
3010 device.
3011 - interrupt-parent : the phandle for the interrupt controller
3012 that services interrupts for this device.
3013
3014 Example Discovery SDMA node:
3015 sdma@4000 {
3016 compatible = "marvell,mv64360-sdma";
3017 reg = <0x4000 0xc18>;
3018 virtual-reg = <0xf1004000>;
3019 interrupts = <36>;
3020 interrupt-parent = <&PIC>;
3021 };
3022
3023
3024 e) Marvell Discovery BRG nodes
3025
3026 Represent baud rate generator hardware associated with the MPSC
3027 (multiprotocol serial controllers).
3028
3029 Required properties:
3030 - compatible : "marvell,mv64360-brg"
3031 - reg : Offset and length of the register set for this device
3032 - clock-src : A value from 0 to 15 which selects the clock
3033 source for the baud rate generator. This value corresponds
3034 to the CLKS value in the BRGx configuration register. See
3035 the mv64x60 User's Manual.
3036 - clock-frequence : The frequency (in Hz) of the baud rate
3037 generator's input clock.
3038 - current-speed : The current speed setting (presumably by
3039 firmware) of the baud rate generator.
3040
3041 Example Discovery BRG node:
3042 brg@b200 {
3043 compatible = "marvell,mv64360-brg";
3044 reg = <0xb200 0x8>;
3045 clock-src = <8>;
3046 clock-frequency = <133333333>;
3047 current-speed = <9600>;
3048 };
3049
3050
3051 f) Marvell Discovery CUNIT nodes
3052
3053 Represent the Serial Communications Unit device hardware.
3054
3055 Required properties:
3056 - reg : Offset and length of the register set for this device
3057
3058 Example Discovery CUNIT node:
3059 cunit@f200 {
3060 reg = <0xf200 0x200>;
3061 };
3062
3063
3064 g) Marvell Discovery MPSCROUTING nodes
3065
3066 Represent the Discovery's MPSC routing hardware
3067
3068 Required properties:
3069 - reg : Offset and length of the register set for this device
3070
3071 Example Discovery CUNIT node:
3072 mpscrouting@b500 {
3073 reg = <0xb400 0xc>;
3074 };
3075
3076
3077 h) Marvell Discovery MPSCINTR nodes
3078
3079 Represent the Discovery's MPSC DMA interrupt hardware registers
3080 (SDMA cause and mask registers).
3081
3082 Required properties:
3083 - reg : Offset and length of the register set for this device
3084
3085 Example Discovery MPSCINTR node:
3086 mpsintr@b800 {
3087 reg = <0xb800 0x100>;
3088 };
3089
3090
3091 i) Marvell Discovery MPSC nodes
3092
3093 Represent the Discovery's MPSC (Multiprotocol Serial Controller)
3094 serial port.
3095
3096 Required properties:
3097 - device_type : "serial"
3098 - compatible : "marvell,mv64360-mpsc"
3099 - reg : Offset and length of the register set for this device
3100 - sdma : the phandle for the SDMA node used by this port
3101 - brg : the phandle for the BRG node used by this port
3102 - cunit : the phandle for the CUNIT node used by this port
3103 - mpscrouting : the phandle for the MPSCROUTING node used by this port
3104 - mpscintr : the phandle for the MPSCINTR node used by this port
3105 - cell-index : the hardware index of this cell in the MPSC core
3106 - max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
3107 register
3108 - interrupts : <a> where a is the interrupt number for the MPSC.
3109 - interrupt-parent : the phandle for the interrupt controller
3110 that services interrupts for this device.
3111
3112 Example Discovery MPSCINTR node:
3113 mpsc@8000 {
3114 device_type = "serial";
3115 compatible = "marvell,mv64360-mpsc";
3116 reg = <0x8000 0x38>;
3117 virtual-reg = <0xf1008000>;
3118 sdma = <&SDMA0>;
3119 brg = <&BRG0>;
3120 cunit = <&CUNIT>;
3121 mpscrouting = <&MPSCROUTING>;
3122 mpscintr = <&MPSCINTR>;
3123 cell-index = <0>;
3124 max_idle = <40>;
3125 interrupts = <40>;
3126 interrupt-parent = <&PIC>;
3127 };
3128
3129
3130 j) Marvell Discovery Watch Dog Timer nodes
3131
3132 Represent the Discovery's watchdog timer hardware
3133
3134 Required properties:
3135 - compatible : "marvell,mv64360-wdt"
3136 - reg : Offset and length of the register set for this device
3137
3138 Example Discovery Watch Dog Timer node:
3139 wdt@b410 {
3140 compatible = "marvell,mv64360-wdt";
3141 reg = <0xb410 0x8>;
3142 };
3143
3144
3145 k) Marvell Discovery I2C nodes
3146
3147 Represent the Discovery's I2C hardware
3148
3149 Required properties:
3150 - device_type : "i2c"
3151 - compatible : "marvell,mv64360-i2c"
3152 - reg : Offset and length of the register set for this device
3153 - interrupts : <a> where a is the interrupt number for the I2C.
3154 - interrupt-parent : the phandle for the interrupt controller
3155 that services interrupts for this device.
3156
3157 Example Discovery I2C node:
3158 compatible = "marvell,mv64360-i2c";
3159 reg = <0xc000 0x20>;
3160 virtual-reg = <0xf100c000>;
3161 interrupts = <37>;
3162 interrupt-parent = <&PIC>;
3163 };
3164
3165
3166 l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
3167
3168 Represent the Discovery's PIC hardware
3169
3170 Required properties:
3171 - #interrupt-cells : <1>
3172 - #address-cells : <0>
3173 - compatible : "marvell,mv64360-pic"
3174 - reg : Offset and length of the register set for this device
3175 - interrupt-controller
3176
3177 Example Discovery PIC node:
3178 pic {
3179 #interrupt-cells = <1>;
3180 #address-cells = <0>;
3181 compatible = "marvell,mv64360-pic";
3182 reg = <0x0 0x88>;
3183 interrupt-controller;
3184 };
3185
3186
3187 m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
3188
3189 Represent the Discovery's MPP hardware
3190
3191 Required properties:
3192 - compatible : "marvell,mv64360-mpp"
3193 - reg : Offset and length of the register set for this device
3194
3195 Example Discovery MPP node:
3196 mpp@f000 {
3197 compatible = "marvell,mv64360-mpp";
3198 reg = <0xf000 0x10>;
3199 };
3200
3201
3202 n) Marvell Discovery GPP (General Purpose Pins) nodes
3203
3204 Represent the Discovery's GPP hardware
3205
3206 Required properties:
3207 - compatible : "marvell,mv64360-gpp"
3208 - reg : Offset and length of the register set for this device
3209
3210 Example Discovery GPP node:
3211 gpp@f000 {
3212 compatible = "marvell,mv64360-gpp";
3213 reg = <0xf100 0x20>;
3214 };
3215
3216
3217 o) Marvell Discovery PCI host bridge node
3218
3219 Represents the Discovery's PCI host bridge device. The properties
3220 for this node conform to Rev 2.1 of the PCI Bus Binding to IEEE
3221 1275-1994. A typical value for the compatible property is
3222 "marvell,mv64360-pci".
3223
3224 Example Discovery PCI host bridge node
3225 pci@80000000 {
3226 #address-cells = <3>;
3227 #size-cells = <2>;
3228 #interrupt-cells = <1>;
3229 device_type = "pci";
3230 compatible = "marvell,mv64360-pci";
3231 reg = <0xcf8 0x8>;
3232 ranges = <0x01000000 0x0 0x0
3233 0x88000000 0x0 0x01000000
3234 0x02000000 0x0 0x80000000
3235 0x80000000 0x0 0x08000000>;
3236 bus-range = <0 255>;
3237 clock-frequency = <66000000>;
3238 interrupt-parent = <&PIC>;
3239 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
3240 interrupt-map = <
3241 /* IDSEL 0x0a */
3242 0x5000 0 0 1 &PIC 80
3243 0x5000 0 0 2 &PIC 81
3244 0x5000 0 0 3 &PIC 91
3245 0x5000 0 0 4 &PIC 93
3246
3247 /* IDSEL 0x0b */
3248 0x5800 0 0 1 &PIC 91
3249 0x5800 0 0 2 &PIC 93
3250 0x5800 0 0 3 &PIC 80
3251 0x5800 0 0 4 &PIC 81
3252
3253 /* IDSEL 0x0c */
3254 0x6000 0 0 1 &PIC 91
3255 0x6000 0 0 2 &PIC 93
3256 0x6000 0 0 3 &PIC 80
3257 0x6000 0 0 4 &PIC 81
3258
3259 /* IDSEL 0x0d */
3260 0x6800 0 0 1 &PIC 93
3261 0x6800 0 0 2 &PIC 80
3262 0x6800 0 0 3 &PIC 81
3263 0x6800 0 0 4 &PIC 91
3264 >;
3265 };
3266
3267
3268 p) Marvell Discovery CPU Error nodes
3269
3270 Represent the Discovery's CPU error handler device.
3271
3272 Required properties:
3273 - compatible : "marvell,mv64360-cpu-error"
3274 - reg : Offset and length of the register set for this device
3275 - interrupts : the interrupt number for this device
3276 - interrupt-parent : the phandle for the interrupt controller
3277 that services interrupts for this device.
3278
3279 Example Discovery CPU Error node:
3280 cpu-error@0070 {
3281 compatible = "marvell,mv64360-cpu-error";
3282 reg = <0x70 0x10 0x128 0x28>;
3283 interrupts = <3>;
3284 interrupt-parent = <&PIC>;
3285 };
3286
3287
3288 q) Marvell Discovery SRAM Controller nodes
3289
3290 Represent the Discovery's SRAM controller device.
3291
3292 Required properties:
3293 - compatible : "marvell,mv64360-sram-ctrl"
3294 - reg : Offset and length of the register set for this device
3295 - interrupts : the interrupt number for this device
3296 - interrupt-parent : the phandle for the interrupt controller
3297 that services interrupts for this device.
3298
3299 Example Discovery SRAM Controller node:
3300 sram-ctrl@0380 {
3301 compatible = "marvell,mv64360-sram-ctrl";
3302 reg = <0x380 0x80>;
3303 interrupts = <13>;
3304 interrupt-parent = <&PIC>;
3305 };
3306
3307
3308 r) Marvell Discovery PCI Error Handler nodes
3309
3310 Represent the Discovery's PCI error handler device.
3311
3312 Required properties:
3313 - compatible : "marvell,mv64360-pci-error"
3314 - reg : Offset and length of the register set for this device
3315 - interrupts : the interrupt number for this device
3316 - interrupt-parent : the phandle for the interrupt controller
3317 that services interrupts for this device.
3318
3319 Example Discovery PCI Error Handler node:
3320 pci-error@1d40 {
3321 compatible = "marvell,mv64360-pci-error";
3322 reg = <0x1d40 0x40 0xc28 0x4>;
3323 interrupts = <12>;
3324 interrupt-parent = <&PIC>;
3325 };
3326
3327
3328 s) Marvell Discovery Memory Controller nodes
3329
3330 Represent the Discovery's memory controller device.
3331
3332 Required properties:
3333 - compatible : "marvell,mv64360-mem-ctrl"
3334 - reg : Offset and length of the register set for this device
3335 - interrupts : the interrupt number for this device
3336 - interrupt-parent : the phandle for the interrupt controller
3337 that services interrupts for this device.
3338
3339 Example Discovery Memory Controller node:
3340 mem-ctrl@1400 {
3341 compatible = "marvell,mv64360-mem-ctrl";
3342 reg = <0x1400 0x60>;
3343 interrupts = <17>;
3344 interrupt-parent = <&PIC>;
3345 };
3346
3347
3348VIII - Specifying interrupt information for devices
2807=================================================== 3349===================================================
2808 3350
2809The device tree represents the busses and devices of a hardware 3351The device tree represents the busses and devices of a hardware