aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/pinctrl.txt
diff options
context:
space:
mode:
authorAnatol Pomozov <anatol.pomozov@gmail.com>2013-05-08 19:56:16 -0400
committerJiri Kosina <jkosina@suse.cz>2013-05-28 06:02:12 -0400
commitf884ab15afdc5514e88105c92a4e2e1e6539869a (patch)
tree24d2bca7a44b4302ca30bdd460a222d677fe1e9b /Documentation/pinctrl.txt
parent7e21f14d179ee8973a9b18552854c9934fcbe370 (diff)
doc: fix misspellings with 'codespell' tool
Signed-off-by: Anatol Pomozov <anatol.pomozov@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'Documentation/pinctrl.txt')
-rw-r--r--Documentation/pinctrl.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
index 447fd4cd54ec..d3c6d3dd7d4d 100644
--- a/Documentation/pinctrl.txt
+++ b/Documentation/pinctrl.txt
@@ -298,7 +298,7 @@ Since the pin controller subsystem have its pinspace local to the pin
298controller we need a mapping so that the pin control subsystem can figure out 298controller we need a mapping so that the pin control subsystem can figure out
299which pin controller handles control of a certain GPIO pin. Since a single 299which pin controller handles control of a certain GPIO pin. Since a single
300pin controller may be muxing several GPIO ranges (typically SoCs that have 300pin controller may be muxing several GPIO ranges (typically SoCs that have
301one set of pins but internally several GPIO silicon blocks, each modeled as 301one set of pins but internally several GPIO silicon blocks, each modelled as
302a struct gpio_chip) any number of GPIO ranges can be added to a pin controller 302a struct gpio_chip) any number of GPIO ranges can be added to a pin controller
303instance like this: 303instance like this:
304 304