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authorLinus Walleij <linus.walleij@linaro.org>2013-06-16 06:15:36 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-06-17 12:18:29 -0400
commit30cf821ea807018898c7c37a8168a705d49b333f (patch)
treed34fb6a77db1fbe5456132d01a7670a67354692b /Documentation/pinctrl.txt
parentff73ceed0b5a046468de20d3b014a8c59051f90a (diff)
pinctrl: update GPIO range doc
This updates the GPIO range documentation with the API changes for sparse/random/arbitrary pin-to-GPIO mappings. Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com> Acked-by: Rob Landley <rob@landley.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/pinctrl.txt')
-rw-r--r--Documentation/pinctrl.txt24
1 files changed, 21 insertions, 3 deletions
diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
index f6e664b6e36b..3ee24759be0f 100644
--- a/Documentation/pinctrl.txt
+++ b/Documentation/pinctrl.txt
@@ -350,6 +350,23 @@ chip b:
350 - GPIO range : [48 .. 55] 350 - GPIO range : [48 .. 55]
351 - pin range : [64 .. 71] 351 - pin range : [64 .. 71]
352 352
353The above examples assume the mapping between the GPIOs and pins is
354linear. If the mapping is sparse or haphazard, an array of arbitrary pin
355numbers can be encoded in the range like this:
356
357static const unsigned range_pins[] = { 14, 1, 22, 17, 10, 8, 6, 2 };
358
359static struct pinctrl_gpio_range gpio_range = {
360 .name = "chip",
361 .id = 0,
362 .base = 32,
363 .pins = &range_pins,
364 .npins = ARRAY_SIZE(range_pins),
365 .gc = &chip;
366};
367
368In this case the pin_base property will be ignored.
369
353When GPIO-specific functions in the pin control subsystem are called, these 370When GPIO-specific functions in the pin control subsystem are called, these
354ranges will be used to look up the appropriate pin controller by inspecting 371ranges will be used to look up the appropriate pin controller by inspecting
355and matching the pin to the pin ranges across all controllers. When a 372and matching the pin to the pin ranges across all controllers. When a
@@ -357,9 +374,9 @@ pin controller handling the matching range is found, GPIO-specific functions
357will be called on that specific pin controller. 374will be called on that specific pin controller.
358 375
359For all functionalities dealing with pin biasing, pin muxing etc, the pin 376For all functionalities dealing with pin biasing, pin muxing etc, the pin
360controller subsystem will subtract the range's .base offset from the passed 377controller subsystem will look up the corresponding pin number from the passed
361in gpio number, and add the ranges's .pin_base offset to retrive a pin number. 378in gpio number, and use the range's internals to retrive a pin number. After
362After that, the subsystem passes it on to the pin control driver, so the driver 379that, the subsystem passes it on to the pin control driver, so the driver
363will get an pin number into its handled number range. Further it is also passed 380will get an pin number into its handled number range. Further it is also passed
364the range ID value, so that the pin controller knows which range it should 381the range ID value, so that the pin controller knows which range it should
365deal with. 382deal with.
@@ -368,6 +385,7 @@ Calling pinctrl_add_gpio_range from pinctrl driver is DEPRECATED. Please see
368section 2.1 of Documentation/devicetree/bindings/gpio/gpio.txt on how to bind 385section 2.1 of Documentation/devicetree/bindings/gpio/gpio.txt on how to bind
369pinctrl and gpio drivers. 386pinctrl and gpio drivers.
370 387
388
371PINMUX interfaces 389PINMUX interfaces
372================= 390=================
373 391