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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /Documentation/parisc/debugging
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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1okay, here are some hints for debugging the lower-level parts of
2linux/parisc.
3
4
51. Absolute addresses
6
7A lot of the assembly code currently runs in real mode, which means
8absolute addresses are used instead of virtual addresses as in the
9rest of the kernel. To translate an absolute address to a virtual
10address you can lookup in System.map, add __PAGE_OFFSET (0x10000000
11currently).
12
13
142. HPMCs
15
16When real-mode code tries to access non-existent memory, you'll get
17an HPMC instead of a kernel oops. To debug an HPMC, try to find
18the System Responder/Requestor addresses. The System Requestor
19address should match (one of the) processor HPAs (high addresses in
20the I/O range); the System Responder address is the address real-mode
21code tried to access.
22
23Typical values for the System Responder address are addresses larger
24than __PAGE_OFFSET (0x10000000) which mean a virtual address didn't
25get translated to a physical address before real-mode code tried to
26access it.
27
28
293. Q bit fun
30
31Certain, very critical code has to clear the Q bit in the PSW. What
32happens when the Q bit is cleared is the CPU does not update the
33registers interruption handlers read to find out where the machine
34was interrupted - so if you get an interruption between the instruction
35that clears the Q bit and the RFI that sets it again you don't know
36where exactly it happened. If you're lucky the IAOQ will point to the
37instrucion that cleared the Q bit, if you're not it points anywhere
38at all. Usually Q bit problems will show themselves in unexplainable
39system hangs or running off the end of physical memory.