diff options
author | Paolo Ornati <ornati@fastwebnet.it> | 2006-10-03 16:57:56 -0400 |
---|---|---|
committer | Adrian Bunk <bunk@stusta.de> | 2006-10-03 16:57:56 -0400 |
commit | 670e9f34ee3c7e052514c85014d2fdd99b672cdc (patch) | |
tree | 41f82a763ba6d5ca2fcb84d6a05808d095d4d051 /Documentation/memory-barriers.txt | |
parent | 53cb47268e6b38180d9f253527135e1c69c5d310 (diff) |
Documentation: remove duplicated words
Remove many duplicated words under Documentation/ and do other small
cleanups.
Examples:
"and and" --> "and"
"in in" --> "in"
"the the" --> "the"
"the the" --> "to the"
...
Signed-off-by: Paolo Ornati <ornati@fastwebnet.it>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'Documentation/memory-barriers.txt')
-rw-r--r-- | Documentation/memory-barriers.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index a60f3ce474e3..994355b0cd19 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt | |||
@@ -670,7 +670,7 @@ effectively random order, despite the write barrier issued by CPU 1: | |||
670 | 670 | ||
671 | 671 | ||
672 | In the above example, CPU 2 perceives that B is 7, despite the load of *C | 672 | In the above example, CPU 2 perceives that B is 7, despite the load of *C |
673 | (which would be B) coming after the the LOAD of C. | 673 | (which would be B) coming after the LOAD of C. |
674 | 674 | ||
675 | If, however, a data dependency barrier were to be placed between the load of C | 675 | If, however, a data dependency barrier were to be placed between the load of C |
676 | and the load of *C (ie: B) on CPU 2: | 676 | and the load of *C (ie: B) on CPU 2: |