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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /Documentation/m68k/README.buddha
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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1
2The Amiga Buddha and Catweasel IDE Driver (part of ide.c) was written by
3Geert Uytterhoeven based on the following specifications:
4
5------------------------------------------------------------------------
6
7Register map of the Buddha IDE controller and the
8Buddha-part of the Catweasel Zorro-II version
9
10The Autoconfiguration has been implemented just as Commodore
11described in their manuals, no tricks have been used (for
12example leaving some address lines out of the equations...).
13If you want to configure the board yourself (for example let
14a Linux kernel configure the card), look at the Commodore
15Docs. Reading the nibbles should give this information:
16
17Vendor number: 4626 ($1212)
18product number: 0 (42 for Catweasel Z-II)
19Serial number: 0
20Rom-vector: $1000
21
22The card should be a Z-II board, size 64K, not for freemem
23list, Rom-Vektor is valid, no second Autoconfig-board on the
24same card, no space preference, supports "Shutup_forever".
25
26Setting the base address should be done in two steps, just
27as the Amiga Kickstart does: The lower nibble of the 8-Bit
28address is written to $4a, then the whole Byte is written to
29$48, while it doesn't matter how often you're writing to $4a
30as long as $48 is not touched. After $48 has been written,
31the whole card disappears from $e8 and is mapped to the new
32address just written. Make shure $4a is written before $48,
33otherwise your chance is only 1:16 to find the board :-).
34
35The local memory-map is even active when mapped to $e8:
36
37$0-$7e Autokonfig-space, see Z-II docs.
38
39$80-$7fd reserved
40
41$7fe Speed-select Register: Read & Write
42 (description see further down)
43
44$800-$8ff IDE-Select 0 (Port 0, Register set 0)
45
46$900-$9ff IDE-Select 1 (Port 0, Register set 1)
47
48$a00-$aff IDE-Select 2 (Port 1, Register set 0)
49
50$b00-$bff IDE-Select 3 (Port 1, Register set 1)
51
52$c00-$cff IDE-Select 4 (Port 2, Register set 0,
53 Catweasel only!)
54
55$d00-$dff IDE-Select 5 (Port 3, Register set 1,
56 Catweasel only!)
57
58$e00-$eff local expansion port, on Catweasel Z-II the
59 Catweasel registers are also mapped here.
60 Never touch, use multidisk.device!
61
62$f00 read only, Byte-access: Bit 7 shows the
63 level of the IRQ-line of IDE port 0.
64
65$f01-$f3f mirror of $f00
66
67$f40 read only, Byte-access: Bit 7 shows the
68 level of the IRQ-line of IDE port 1.
69
70$f41-$f7f mirror of $f40
71
72$f80 read only, Byte-access: Bit 7 shows the
73 level of the IRQ-line of IDE port 2.
74 (Catweasel only!)
75
76$f81-$fbf mirror of $f80
77
78$fc0 write-only: Writing any value to this
79 register enables IRQs to be passed from the
80 IDE ports to the Zorro bus. This mechanism
81 has been implemented to be compatible with
82 harddisks that are either defective or have
83 a buggy firmware and pull the IRQ line up
84 while starting up. If interrupts would
85 always be passed to the bus, the computer
86 might not start up. Once enabled, this flag
87 can not be disabled again. The level of the
88 flag can not be determined by software
89 (what for? Write to me if it's necessary!).
90
91$fc1-$fff mirror of $fc0
92
93$1000-$ffff Buddha-Rom with offset $1000 in the rom
94 chip. The addresses $0 to $fff of the rom
95 chip cannot be read. Rom is Byte-wide and
96 mapped to even addresses.
97
98The IDE ports issue an INT2. You can read the level of the
99IRQ-lines of the IDE-ports by reading from the three (two
100for Buddha-only) registers $f00, $f40 and $f80. This way
101more than one I/O request can be handled and you can easily
102determine what driver has to serve the INT2. Buddha and
103Catweasel expansion boards can issue an INT6. A separate
104memory map is available for the I/O module and the sysop's
105I/O module.
106
107The IDE ports are fed by the address lines A2 to A4, just as
108the Amiga 1200 and Amiga 4000 IDE ports are. This way
109existing drivers can be easily ported to Buddha. A move.l
110polls two words out of the same address of IDE port since
111every word is mirrored once. movem is not possible, but
112it's not necessary either, because you can only speedup
11368000 systems with this technique. A 68020 system with
114fastmem is faster with move.l.
115
116If you're using the mirrored registers of the IDE-ports with
117A6=1, the Buddha doesn't care about the speed that you have
118selected in the speed register (see further down). With
119A6=1 (for example $840 for port 0, register set 0), a 780ns
120access is being made. These registers should be used for a
121command access to the harddisk/CD-Rom, since command
122accesses are Byte-wide and have to be made slower according
123to the ATA-X3T9 manual.
124
125Now for the speed-register: The register is byte-wide, and
126only the upper three bits are used (Bits 7 to 5). Bit 4
127must always be set to 1 to be compatible with later Buddha
128versions (if I'll ever update this one). I presume that
129I'll never use the lower four bits, but they have to be set
130to 1 by definition.
131 The values in this table have to be shifted 5 bits to the
132left and or'd with $1f (this sets the lower 5 bits).
133
134All the timings have in common: Select and IOR/IOW rise at
135the same time. IOR and IOW have a propagation delay of
136about 30ns to the clocks on the Zorro bus, that's why the
137values are no multiple of 71. One clock-cycle is 71ns long
138(exactly 70,5 at 14,18 Mhz on PAL systems).
139
140value 0 (Default after reset)
141
142497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
143(same timing as the Amiga 1200 does on it's IDE port without
144accelerator card)
145
146value 1
147
148639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
149
150value 2
151
152781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
153
154value 3
155
156355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
157
158value 4
159
160355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
161
162value 5
163
164355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
165
166value 6
167
1681065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
169
170value 7
171
172355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
173
174When accessing IDE registers with A6=1 (for example $84x),
175the timing will always be mode 0 8-bit compatible, no matter
176what you have selected in the speed register:
177
178781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive.
179
180All the timings with a very short select-signal (the 355ns
181fast accesses) depend on the accelerator card used in the
182system: Sometimes two more clock cycles are inserted by the
183bus interface, making the whole access 497ns long. This
184doesn't affect the reliability of the controller nor the
185performance of the card, since this doesn't happen very
186often.
187
188All the timings are calculated and only confirmed by
189measurements that allowed me to count the clock cycles. If
190the system is clocked by an oscillator other than 28,37516
191Mhz (for example the NTSC-frequency 28,63636 Mhz), each
192clock cycle is shortened to a bit less than 70ns (not worth
193mentioning). You could think of a small performance boost
194by overclocking the system, but you would either need a
195multisync monitor, or a graphics card, and your internal
196diskdrive would go crazy, that's why you shouldn't tune your
197Amiga this way.
198
199Giving you the possibility to write software that is
200compatible with both the Buddha and the Catweasel Z-II, The
201Buddha acts just like a Catweasel Z-II with no device
202connected to the third IDE-port. The IRQ-register $f80
203always shows a "no IRQ here" on the Buddha, and accesses to
204the third IDE port are going into data's Nirwana on the
205Buddha.
206
207 Jens Schönfeld february 19th, 1997
208 updated may 27th, 1997
209 eMail: sysop@nostlgic.tng.oche.de
210