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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /Documentation/i2c/busses/i2c-piix4
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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1Kernel driver i2c-piix4
2
3Supported adapters:
4 * Intel 82371AB PIIX4 and PIIX4E
5 * Intel 82443MX (440MX)
6 Datasheet: Publicly available at the Intel website
7 * ServerWorks OSB4, CSB5 and CSB6 southbridges
8 Datasheet: Only available via NDA from ServerWorks
9 * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
10 Datasheet: Publicly available at the SMSC website http://www.smsc.com
11
12Authors:
13 Frodo Looijaard <frodol@dds.nl>
14 Philip Edelbrock <phil@netroedge.com>
15
16
17Module Parameters
18-----------------
19
20* force: int
21 Forcibly enable the PIIX4. DANGEROUS!
22* force_addr: int
23 Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS!
24* fix_hstcfg: int
25 Fix config register. Needed on some boards (Force CPCI735).
26
27
28Description
29-----------
30
31The PIIX4 (properly known as the 82371AB) is an Intel chip with a lot of
32functionality. Among other things, it implements the PCI bus. One of its
33minor functions is implementing a System Management Bus. This is a true
34SMBus - you can not access it on I2C levels. The good news is that it
35natively understands SMBus commands and you do not have to worry about
36timing problems. The bad news is that non-SMBus devices connected to it can
37confuse it mightily. Yes, this is known to happen...
38
39Do 'lspci -v' and see whether it contains an entry like this:
40
410000:00:02.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02)
42 Flags: medium devsel, IRQ 9
43
44Bus and device numbers may differ, but the function number must be
45identical (like many PCI devices, the PIIX4 incorporates a number of
46different 'functions', which can be considered as separate devices). If you
47find such an entry, you have a PIIX4 SMBus controller.
48
49On some computers (most notably, some Dells), the SMBus is disabled by
50default. If you use the insmod parameter 'force=1', the kernel module will
51try to enable it. THIS IS VERY DANGEROUS! If the BIOS did not set up a
52correct address for this module, you could get in big trouble (read:
53crashes, data corruption, etc.). Try this only as a last resort (try BIOS
54updates first, for example), and backup first! An even more dangerous
55option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like
56'force' foes, but it will also set a new base I/O port address. The SMBus
57parts of the PIIX4 needs a range of 8 of these addresses to function
58correctly. If these addresses are already reserved by some other device,
59you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE
60ABOUT WHAT YOU ARE DOING!
61
62The PIIX4E is just an new version of the PIIX4; it is supported as well.
63The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use
64this driver on those mainboards.
65
66The ServerWorks Southbridges, the Intel 440MX, and the Victory766 are
67identical to the PIIX4 in I2C/SMBus support.
68
69A few OSB4 southbridges are known to be misconfigured by the BIOS. In this
70case, you have you use the fix_hstcfg module parameter. Do not use it
71unless you know you have to, because in some cases it also breaks
72configuration on southbridges that don't need it.