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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /Documentation/i2c/busses/i2c-i801
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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1Kernel driver i2c-i801
2
3Supported adapters:
4 * Intel 82801AA and 82801AB (ICH and ICH0 - part of the
5 '810' and '810E' chipsets)
6 * Intel 82801BA (ICH2 - part of the '815E' chipset)
7 * Intel 82801CA/CAM (ICH3)
8 * Intel 82801DB (ICH4) (HW PEC supported, 32 byte buffer not supported)
9 * Intel 82801EB/ER (ICH5) (HW PEC supported, 32 byte buffer not supported)
10 * Intel 6300ESB
11 * Intel 82801FB/FR/FW/FRW (ICH6)
12 * Intel ICH7
13 Datasheets: Publicly available at the Intel website
14
15Authors:
16 Frodo Looijaard <frodol@dds.nl>,
17 Philip Edelbrock <phil@netroedge.com>,
18 Mark Studebaker <mdsxyz123@yahoo.com>
19
20
21Module Parameters
22-----------------
23
24* force_addr: int
25 Forcibly enable the ICH at the given address. EXTREMELY DANGEROUS!
26
27
28Description
29-----------
30
31The ICH (properly known as the 82801AA), ICH0 (82801AB), ICH2 (82801BA),
32ICH3 (82801CA/CAM) and later devices are Intel chips that are a part of
33Intel's '810' chipset for Celeron-based PCs, '810E' chipset for
34Pentium-based PCs, '815E' chipset, and others.
35
36The ICH chips contain at least SEVEN separate PCI functions in TWO logical
37PCI devices. An output of lspci will show something similar to the
38following:
39
40 00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01)
41 00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01)
42 00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01)
43 00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01)
44 00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01)
45
46The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial
47Controller.
48
49If you do NOT see the 24x3 device at function 3, and you can't figure out
50any way in the BIOS to enable it,
51
52The ICH chips are quite similar to Intel's PIIX4 chip, at least in the
53SMBus controller.
54
55See the file i2c-piix4 for some additional information.
56
57
58Process Call Support
59--------------------
60
61Not supported.
62
63
64I2C Block Read Support
65----------------------
66
67Not supported at the moment.
68
69
70SMBus 2.0 Support
71-----------------
72
73The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
74
75**********************
76The lm_sensors project gratefully acknowledges the support of Texas
77Instruments in the initial development of this driver.
78
79The lm_sensors project gratefully acknowledges the support of Intel in the
80development of SMBus 2.0 / ICH4 features of this driver.