hwmon: (pmbus/adm1275) Add support for second current limit

ADM1275 supports a second current limit, which can be configured as either lower
or upper limit. Add support for it and report it as either lower or upper
critical current limit.

Also replace error return code EINVAL for unsupported pages with ENXIO as this
is more appropriate for the observed condition.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jean Delvare <khali@linux-fr.org>

1 files changed, 8 insertions, 0 deletions

diff --git a/Documentation/hwmon/adm1275 b/Documentation/hwmon/adm1275
index 097b3ccc4be7..c438c98bdbc8 100644
--- a/Documentation/hwmon/adm1275
+++ b/Documentation/hwmon/adm1275
@@ -60,5 +60,13 @@ curr1_label		"iout1"
 curr1_input             Measured current. From READ_IOUT register.
 curr1_max               Maximum current. From IOUT_OC_WARN_LIMIT register.
 curr1_max_alarm         Current high alarm. From IOUT_OC_WARN_LIMIT register.
+curr1_lcrit             Critical minimum current. Depending on the chip
+                        configuration, either curr1_lcrit or curr1_crit is
+                        supported, but not both.
+curr1_lcrit_alarm       Critical current low alarm.
+curr1_crit              Critical maximum current. Depending on the chip
+                        configuration, either curr1_lcrit or curr1_crit is
+                        supported, but not both.
+curr1_crit_alarm        Critical current high alarm.
 curr1_highest           Historical maximum current.
 curr1_reset_history     Write any value to reset history.