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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2007-01-30 12:40:30 -0500
committerJeff Garzik <jeff@garzik.org>2007-02-09 17:39:38 -0500
commit24a01453892e0a4a6ad38460541bd0dae9b1837f (patch)
treebcf4e72523a229a67d12eb9798b40f975eeb04fc /Documentation/driver-model
parent246ce3b675843e0369643cceb4faeb6cf6d19a30 (diff)
pata_sl82c105: wrong assumptions about compatible PIO modes
Fix the wrong "compatible" PIO mode choices: MWDMA0 has 480 ns cycle while PIO1 only has 383 ns cycle, and MWDMA2 timings matchs those of PIO4 exactly. Signed-off-by: Jeff Garzik <jeff@garzik.org>
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