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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2015-03-11 20:39:49 -0400
committerVinod Koul <vinod.koul@intel.com>2015-03-18 04:27:54 -0400
commit3cd44dcd35a6618df88c51561290dc02fb35b8e2 (patch)
tree35654cc0a5248615f501a5502eec561e1faf38e0 /Documentation/devicetree
parentc078c62a752872fb83f56e41794dd61d5ea570a0 (diff)
dmaengine: remove Renesas Audio DMAC peri peri
Renesas R-Car sound (= rsnd) needs 2 DMAC which are called as Audio DMAC (= 1st DMAC) and Audio DMAC peri peri (2nd DMAC). And rsnd had assumed that 1st / 2nd DMACs are implemented as DMAEngine. But, in result of DMA ML discussion, 2nd DMAC was concluded that it is not a general purpose DMAC (2nd DMAC is for Device to Device inside sound system). Additionally, current DMAEngine can't support Device to Device, and we don't have correct DT bindings for it at this point. So the easiest solution for it is that move it from DMAEngine to rsnd driver. Audio DMAC peri peri on DMAEngine is no longer needed. remove it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/dma/rcar-audmapp.txt29
1 files changed, 0 insertions, 29 deletions
diff --git a/Documentation/devicetree/bindings/dma/rcar-audmapp.txt b/Documentation/devicetree/bindings/dma/rcar-audmapp.txt
deleted file mode 100644
index 61bca509d7b9..000000000000
--- a/Documentation/devicetree/bindings/dma/rcar-audmapp.txt
+++ /dev/null
@@ -1,29 +0,0 @@
1* R-Car Audio DMAC peri peri Device Tree bindings
2
3Required properties:
4- compatible: should be "renesas,rcar-audmapp"
5- #dma-cells: should be <1>, see "dmas" property below
6
7Example:
8 audmapp: audio-dma-pp@0xec740000 {
9 compatible = "renesas,rcar-audmapp";
10 #dma-cells = <1>;
11
12 reg = <0 0xec740000 0 0x200>;
13 };
14
15
16* DMA client
17
18Required properties:
19- dmas: a list of <[DMA multiplexer phandle] [SRS << 8 | DRS]> pairs.
20 where SRS/DRS are specified in the SoC manual.
21 It will be written into PDMACHCR as high 16-bit parts.
22- dma-names: a list of DMA channel names, one per "dmas" entry
23
24Example:
25
26 dmas = <&audmapp 0x2d00
27 &audmapp 0x3700>;
28 dma-names = "src0_ssiu0",
29 "dvc0_ssiu0";