Merge tag 'pwm/for-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This contains two new drivers, one for Allwinner SoCs and the other
  for Imagination Technologies' Pistachio SoC.

  Complementing this are a couple of fixes to the Atmel HLCDC PWM and
  STi PWM drivers as well as minor cleanups to the core and the Tegra
  driver"

* tag 'pwm/for-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: tegra: Use NSEC_PER_SEC
  pwm: Remove unnecessary check before of_node_put()
  pwm: Add device tree binding document for IMG PWM DAC
  pwm: Imagination Technologies PWM DAC driver
  pwm: sti: Maintain a bitmap of configured devices
  pwm: sunxi: document OF bindings
  pwm: Add Allwinner SoC support
  pwm: atmel-hlcdc: Prevent division by zero
  pwm: atmel-hlcdc: Depend on HAVE_CLK

2 files changed, 44 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/pwm/img-pwm.txt b/Documentation/devicetree/bindings/pwm/img-pwm.txt
new file mode 100644
index 000000000000..fade5f26fcac
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/img-pwm.txt
@@ -0,0 +1,24 @@
+*Imagination Technologies PWM DAC driver
+
+Required properties:
+  - compatible: Should be "img,pistachio-pwm"
+  - reg: Should contain physical base address and length of pwm registers.
+  - clocks: Must contain an entry for each entry in clock-names.
+        See ../clock/clock-bindings.txt for details.
+  - clock-names: Must include the following entries.
+    - pwm: PWM operating clock.
+    - sys: PWM system interface clock.
+  - #pwm-cells: Should be 2. See pwm.txt in this directory for the
+        description of the cells format.
+  - img,cr-periph: Must contain a phandle to the peripheral control
+        syscon node which contains PWM control registers.
+
+Example:
+        pwm: pwm@18101300 {
+                compatible = "img,pistachio-pwm";
+                reg = <0x18101300 0x100>;
+                clocks = <&pwm_clk>, <&system_clk>;
+                clock-names = "pwm", "sys";
+                #pwm-cells = <2>;
+                img,cr-periph = <&cr_periph>;
+        };
diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt
new file mode 100644
index 000000000000..ae0273e19506
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt
@@ -0,0 +1,20 @@
+Allwinner sun4i and sun7i SoC PWM controller
+
+Required properties:
+  - compatible: should be one of:
+    - "allwinner,sun4i-a10-pwm"
+    - "allwinner,sun7i-a20-pwm"
+  - reg: physical base address and length of the controller's registers
+  - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+    the cells format.
+  - clocks: From common clock binding, handle to the parent clock.
+
+Example:
+
+        pwm: pwm@01c20e00 {
+                compatible = "allwinner,sun7i-a20-pwm";
+                reg = <0x01c20e00 0xc>;
+                clocks = <&osc24M>;
+                #pwm-cells = <3>;
+                status = "disabled";
+        };