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authorStephen Warren <swarren@nvidia.com>2013-11-07 12:11:27 -0500
committerStephen Warren <swarren@nvidia.com>2013-12-11 18:42:13 -0500
commit07999587b7bbedbb6556c94f70227a99e66f19aa (patch)
tree004f11ac8247ef0aa72f5c81fde41e804f7167c2 /Documentation/devicetree
parentd8f64797c5ff3351a54830bba2cbc7e0b00e4613 (diff)
ARM: tegra: document reset properties in DT bindings
Update all the Tegra DT bindings to require resets/reset-names properties where the HW module has reset inputs. Remove any entries from clocks or clock-names that were only required to identify reset inputs, rather than referring to real clocks. This is a DT-ABI-incompatible change. It is the first of two changes required for me to consider the Tegra DT bindings as stable, the other being conversion to the common DMA DT bindings. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt4
-rw-r--r--Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt4
-rw-r--r--Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt4
-rw-r--r--Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt4
-rw-r--r--Documentation/devicetree/bindings/dma/tegra20-apbdma.txt6
-rw-r--r--Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt63
-rw-r--r--Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt6
-rw-r--r--Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt6
-rw-r--r--Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt6
-rw-r--r--Documentation/devicetree/bindings/nvec/nvidia,nvec.txt4
-rw-r--r--Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt14
-rw-r--r--Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt6
-rw-r--r--Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt6
-rw-r--r--Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt6
-rw-r--r--Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt6
-rw-r--r--Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt17
-rw-r--r--Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt6
-rw-r--r--Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt6
-rw-r--r--Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt6
-rw-r--r--Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt6
-rw-r--r--Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt4
21 files changed, 181 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
index 0c80c2677104..9acea9d93160 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
@@ -15,6 +15,9 @@ Required properties :
15 In clock consumers, this cell represents the clock ID exposed by the 15 In clock consumers, this cell represents the clock ID exposed by the
16 CAR. The assignments may be found in header file 16 CAR. The assignments may be found in header file
17 <dt-bindings/clock/tegra114-car.h>. 17 <dt-bindings/clock/tegra114-car.h>.
18- #reset-cells : Should be 1.
19 In clock consumers, this cell represents the bit number in the CAR's
20 array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
18 21
19Example SoC include file: 22Example SoC include file:
20 23
@@ -23,6 +26,7 @@ Example SoC include file:
23 compatible = "nvidia,tegra114-car"; 26 compatible = "nvidia,tegra114-car";
24 reg = <0x60006000 0x1000>; 27 reg = <0x60006000 0x1000>;
25 #clock-cells = <1>; 28 #clock-cells = <1>;
29 #reset-cells = <1>;
26 }; 30 };
27 31
28 usb@c5004000 { 32 usb@c5004000 {
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
index 1a91ec60dee5..ded5d6212c84 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
@@ -15,6 +15,9 @@ Required properties :
15 In clock consumers, this cell represents the clock ID exposed by the 15 In clock consumers, this cell represents the clock ID exposed by the
16 CAR. The assignments may be found in header file 16 CAR. The assignments may be found in header file
17 <dt-bindings/clock/tegra124-car.h>. 17 <dt-bindings/clock/tegra124-car.h>.
18- #reset-cells : Should be 1.
19 In clock consumers, this cell represents the bit number in the CAR's
20 array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
18 21
19Example SoC include file: 22Example SoC include file:
20 23
@@ -23,6 +26,7 @@ Example SoC include file:
23 compatible = "nvidia,tegra124-car"; 26 compatible = "nvidia,tegra124-car";
24 reg = <0x60006000 0x1000>; 27 reg = <0x60006000 0x1000>;
25 #clock-cells = <1>; 28 #clock-cells = <1>;
29 #reset-cells = <1>;
26 }; 30 };
27 31
28 usb@c5004000 { 32 usb@c5004000 {
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
index fcfed5bf73fb..6c5901b503d0 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
@@ -15,6 +15,9 @@ Required properties :
15 In clock consumers, this cell represents the clock ID exposed by the 15 In clock consumers, this cell represents the clock ID exposed by the
16 CAR. The assignments may be found in header file 16 CAR. The assignments may be found in header file
17 <dt-bindings/clock/tegra20-car.h>. 17 <dt-bindings/clock/tegra20-car.h>.
18- #reset-cells : Should be 1.
19 In clock consumers, this cell represents the bit number in the CAR's
20 array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
18 21
19Example SoC include file: 22Example SoC include file:
20 23
@@ -23,6 +26,7 @@ Example SoC include file:
23 compatible = "nvidia,tegra20-car"; 26 compatible = "nvidia,tegra20-car";
24 reg = <0x60006000 0x1000>; 27 reg = <0x60006000 0x1000>;
25 #clock-cells = <1>; 28 #clock-cells = <1>;
29 #reset-cells = <1>;
26 }; 30 };
27 31
28 usb@c5004000 { 32 usb@c5004000 {
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
index 0f714081e986..63618cde12df 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
@@ -15,6 +15,9 @@ Required properties :
15 In clock consumers, this cell represents the clock ID exposed by the 15 In clock consumers, this cell represents the clock ID exposed by the
16 CAR. The assignments may be found in header file 16 CAR. The assignments may be found in header file
17 <dt-bindings/clock/tegra30-car.h>. 17 <dt-bindings/clock/tegra30-car.h>.
18- #reset-cells : Should be 1.
19 In clock consumers, this cell represents the bit number in the CAR's
20 array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
18 21
19Example SoC include file: 22Example SoC include file:
20 23
@@ -23,6 +26,7 @@ Example SoC include file:
23 compatible = "nvidia,tegra30-car"; 26 compatible = "nvidia,tegra30-car";
24 reg = <0x60006000 0x1000>; 27 reg = <0x60006000 0x1000>;
25 #clock-cells = <1>; 28 #clock-cells = <1>;
29 #reset-cells = <1>;
26 }; 30 };
27 31
28 usb@c5004000 { 32 usb@c5004000 {
diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
index e0a68b972891..e0b166a7f04a 100644
--- a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
+++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
@@ -7,6 +7,10 @@ Required properties:
7- interrupts: Should contain all of the per-channel DMA interrupts. 7- interrupts: Should contain all of the per-channel DMA interrupts.
8- clocks: Must contain one entry, for the module clock. 8- clocks: Must contain one entry, for the module clock.
9 See ../clocks/clock-bindings.txt for details. 9 See ../clocks/clock-bindings.txt for details.
10- resets : Must contain an entry for each entry in reset-names.
11 See ../reset/reset.txt for details.
12- reset-names : Must include the following entries:
13 - dma
10 14
11Examples: 15Examples:
12 16
@@ -30,4 +34,6 @@ apbdma: dma@6000a000 {
30 0 150 0x04 34 0 150 0x04
31 0 151 0x04 >; 35 0 151 0x04 >;
32 clocks = <&tegra_car 34>; 36 clocks = <&tegra_car 34>;
37 resets = <&tegra_car 34>;
38 reset-names = "dma";
33}; 39};
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index 8b4367f86b95..ab45c02aa658 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -11,6 +11,10 @@ Required properties:
11- ranges: The mapping of the host1x address space to the CPU address space. 11- ranges: The mapping of the host1x address space to the CPU address space.
12- clocks: Must contain one entry, for the module clock. 12- clocks: Must contain one entry, for the module clock.
13 See ../clocks/clock-bindings.txt for details. 13 See ../clocks/clock-bindings.txt for details.
14- resets: Must contain an entry for each entry in reset-names.
15 See ../reset/reset.txt for details.
16- reset-names: Must include the following entries:
17 - host1x
14 18
15The host1x top-level node defines a number of children, each representing one 19The host1x top-level node defines a number of children, each representing one
16of the following host1x client modules: 20of the following host1x client modules:
@@ -23,6 +27,10 @@ of the following host1x client modules:
23 - interrupts: The interrupt outputs from the controller. 27 - interrupts: The interrupt outputs from the controller.
24 - clocks: Must contain one entry, for the module clock. 28 - clocks: Must contain one entry, for the module clock.
25 See ../clocks/clock-bindings.txt for details. 29 See ../clocks/clock-bindings.txt for details.
30 - resets: Must contain an entry for each entry in reset-names.
31 See ../reset/reset.txt for details.
32 - reset-names: Must include the following entries:
33 - mpe
26 34
27- vi: video input 35- vi: video input
28 36
@@ -32,6 +40,10 @@ of the following host1x client modules:
32 - interrupts: The interrupt outputs from the controller. 40 - interrupts: The interrupt outputs from the controller.
33 - clocks: Must contain one entry, for the module clock. 41 - clocks: Must contain one entry, for the module clock.
34 See ../clocks/clock-bindings.txt for details. 42 See ../clocks/clock-bindings.txt for details.
43 - resets: Must contain an entry for each entry in reset-names.
44 See ../reset/reset.txt for details.
45 - reset-names: Must include the following entries:
46 - vi
35 47
36- epp: encoder pre-processor 48- epp: encoder pre-processor
37 49
@@ -41,6 +53,10 @@ of the following host1x client modules:
41 - interrupts: The interrupt outputs from the controller. 53 - interrupts: The interrupt outputs from the controller.
42 - clocks: Must contain one entry, for the module clock. 54 - clocks: Must contain one entry, for the module clock.
43 See ../clocks/clock-bindings.txt for details. 55 See ../clocks/clock-bindings.txt for details.
56 - resets: Must contain an entry for each entry in reset-names.
57 See ../reset/reset.txt for details.
58 - reset-names: Must include the following entries:
59 - epp
44 60
45- isp: image signal processor 61- isp: image signal processor
46 62
@@ -50,6 +66,10 @@ of the following host1x client modules:
50 - interrupts: The interrupt outputs from the controller. 66 - interrupts: The interrupt outputs from the controller.
51 - clocks: Must contain one entry, for the module clock. 67 - clocks: Must contain one entry, for the module clock.
52 See ../clocks/clock-bindings.txt for details. 68 See ../clocks/clock-bindings.txt for details.
69 - resets: Must contain an entry for each entry in reset-names.
70 See ../reset/reset.txt for details.
71 - reset-names: Must include the following entries:
72 - isp
53 73
54- gr2d: 2D graphics engine 74- gr2d: 2D graphics engine
55 75
@@ -59,6 +79,10 @@ of the following host1x client modules:
59 - interrupts: The interrupt outputs from the controller. 79 - interrupts: The interrupt outputs from the controller.
60 - clocks: Must contain one entry, for the module clock. 80 - clocks: Must contain one entry, for the module clock.
61 See ../clocks/clock-bindings.txt for details. 81 See ../clocks/clock-bindings.txt for details.
82 - resets: Must contain an entry for each entry in reset-names.
83 See ../reset/reset.txt for details.
84 - reset-names: Must include the following entries:
85 - 2d
62 86
63- gr3d: 3D graphics engine 87- gr3d: 3D graphics engine
64 88
@@ -72,6 +96,11 @@ of the following host1x client modules:
72 - 3d 96 - 3d
73 This MUST be the first entry. 97 This MUST be the first entry.
74 - 3d2 (Only required on SoCs with two 3D clocks) 98 - 3d2 (Only required on SoCs with two 3D clocks)
99 - resets: Must contain an entry for each entry in reset-names.
100 See ../reset/reset.txt for details.
101 - reset-names: Must include the following entries:
102 - 3d
103 - 3d2 (Only required on SoCs with two 3D clocks)
75 104
76- dc: display controller 105- dc: display controller
77 106
@@ -85,6 +114,10 @@ of the following host1x client modules:
85 - dc 114 - dc
86 This MUST be the first entry. 115 This MUST be the first entry.
87 - parent 116 - parent
117 - resets: Must contain an entry for each entry in reset-names.
118 See ../reset/reset.txt for details.
119 - reset-names: Must include the following entries:
120 - dc
88 121
89 Each display controller node has a child node, named "rgb", that represents 122 Each display controller node has a child node, named "rgb", that represents
90 the RGB output associated with the controller. It can take the following 123 the RGB output associated with the controller. It can take the following
@@ -107,6 +140,10 @@ of the following host1x client modules:
107 - hdmi 140 - hdmi
108 This MUST be the first entry. 141 This MUST be the first entry.
109 - parent 142 - parent
143 - resets: Must contain an entry for each entry in reset-names.
144 See ../reset/reset.txt for details.
145 - reset-names: Must include the following entries:
146 - hdmi
110 147
111 Optional properties: 148 Optional properties:
112 - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing 149 - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
@@ -133,6 +170,10 @@ of the following host1x client modules:
133 - dsi 170 - dsi
134 This MUST be the first entry. 171 This MUST be the first entry.
135 - parent 172 - parent
173 - resets: Must contain an entry for each entry in reset-names.
174 See ../reset/reset.txt for details.
175 - reset-names: Must include the following entries:
176 - dsi
136 177
137Example: 178Example:
138 179
@@ -145,6 +186,8 @@ Example:
145 interrupts = <0 65 0x04 /* mpcore syncpt */ 186 interrupts = <0 65 0x04 /* mpcore syncpt */
146 0 67 0x04>; /* mpcore general */ 187 0 67 0x04>; /* mpcore general */
147 clocks = <&tegra_car TEGRA20_CLK_HOST1X>; 188 clocks = <&tegra_car TEGRA20_CLK_HOST1X>;
189 resets = <&tegra_car 28>;
190 reset-names = "host1x";
148 191
149 #address-cells = <1>; 192 #address-cells = <1>;
150 #size-cells = <1>; 193 #size-cells = <1>;
@@ -156,6 +199,8 @@ Example:
156 reg = <0x54040000 0x00040000>; 199 reg = <0x54040000 0x00040000>;
157 interrupts = <0 68 0x04>; 200 interrupts = <0 68 0x04>;
158 clocks = <&tegra_car TEGRA20_CLK_MPE>; 201 clocks = <&tegra_car TEGRA20_CLK_MPE>;
202 resets = <&tegra_car 60>;
203 reset-names = "mpe";
159 }; 204 };
160 205
161 vi { 206 vi {
@@ -163,6 +208,8 @@ Example:
163 reg = <0x54080000 0x00040000>; 208 reg = <0x54080000 0x00040000>;
164 interrupts = <0 69 0x04>; 209 interrupts = <0 69 0x04>;
165 clocks = <&tegra_car TEGRA20_CLK_VI>; 210 clocks = <&tegra_car TEGRA20_CLK_VI>;
211 resets = <&tegra_car 100>;
212 reset-names = "vi";
166 }; 213 };
167 214
168 epp { 215 epp {
@@ -170,6 +217,8 @@ Example:
170 reg = <0x540c0000 0x00040000>; 217 reg = <0x540c0000 0x00040000>;
171 interrupts = <0 70 0x04>; 218 interrupts = <0 70 0x04>;
172 clocks = <&tegra_car TEGRA20_CLK_EPP>; 219 clocks = <&tegra_car TEGRA20_CLK_EPP>;
220 resets = <&tegra_car 19>;
221 reset-names = "epp";
173 }; 222 };
174 223
175 isp { 224 isp {
@@ -177,6 +226,8 @@ Example:
177 reg = <0x54100000 0x00040000>; 226 reg = <0x54100000 0x00040000>;
178 interrupts = <0 71 0x04>; 227 interrupts = <0 71 0x04>;
179 clocks = <&tegra_car TEGRA20_CLK_ISP>; 228 clocks = <&tegra_car TEGRA20_CLK_ISP>;
229 resets = <&tegra_car 23>;
230 reset-names = "isp";
180 }; 231 };
181 232
182 gr2d { 233 gr2d {
@@ -184,12 +235,16 @@ Example:
184 reg = <0x54140000 0x00040000>; 235 reg = <0x54140000 0x00040000>;
185 interrupts = <0 72 0x04>; 236 interrupts = <0 72 0x04>;
186 clocks = <&tegra_car TEGRA20_CLK_GR2D>; 237 clocks = <&tegra_car TEGRA20_CLK_GR2D>;
238 resets = <&tegra_car 21>;
239 reset-names = "2d";
187 }; 240 };
188 241
189 gr3d { 242 gr3d {
190 compatible = "nvidia,tegra20-gr3d"; 243 compatible = "nvidia,tegra20-gr3d";
191 reg = <0x54180000 0x00040000>; 244 reg = <0x54180000 0x00040000>;
192 clocks = <&tegra_car TEGRA20_CLK_GR3D>; 245 clocks = <&tegra_car TEGRA20_CLK_GR3D>;
246 resets = <&tegra_car 24>;
247 reset-names = "3d";
193 }; 248 };
194 249
195 dc@54200000 { 250 dc@54200000 {
@@ -199,6 +254,8 @@ Example:
199 clocks = <&tegra_car TEGRA20_CLK_DISP1>, 254 clocks = <&tegra_car TEGRA20_CLK_DISP1>,
200 <&tegra_car TEGRA20_CLK_PLL_P>; 255 <&tegra_car TEGRA20_CLK_PLL_P>;
201 clock-names = "disp1", "parent"; 256 clock-names = "disp1", "parent";
257 resets = <&tegra_car 27>;
258 reset-names = "dc";
202 259
203 rgb { 260 rgb {
204 status = "disabled"; 261 status = "disabled";
@@ -212,6 +269,8 @@ Example:
212 clocks = <&tegra_car TEGRA20_CLK_DISP2>, 269 clocks = <&tegra_car TEGRA20_CLK_DISP2>,
213 <&tegra_car TEGRA20_CLK_PLL_P>; 270 <&tegra_car TEGRA20_CLK_PLL_P>;
214 clock-names = "disp2", "parent"; 271 clock-names = "disp2", "parent";
272 resets = <&tegra_car 26>;
273 reset-names = "dc";
215 274
216 rgb { 275 rgb {
217 status = "disabled"; 276 status = "disabled";
@@ -225,6 +284,8 @@ Example:
225 clocks = <&tegra_car TEGRA20_CLK_HDMI>, 284 clocks = <&tegra_car TEGRA20_CLK_HDMI>,
226 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>; 285 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
227 clock-names = "hdmi", "parent"; 286 clock-names = "hdmi", "parent";
287 resets = <&tegra_car 51>;
288 reset-names = "hdmi";
228 status = "disabled"; 289 status = "disabled";
229 }; 290 };
230 291
@@ -242,6 +303,8 @@ Example:
242 clocks = <&tegra_car TEGRA20_CLK_DSI>, 303 clocks = <&tegra_car TEGRA20_CLK_DSI>,
243 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>; 304 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
244 clock-names = "dsi", "parent"; 305 clock-names = "dsi", "parent";
306 resets = <&tegra_car 48>;
307 reset-names = "dsi";
245 status = "disabled"; 308 status = "disabled";
246 }; 309 };
247 }; 310 };
diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
index 173fbaab687b..10d2afdb76f4 100644
--- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
@@ -47,6 +47,10 @@ Required properties:
47 - fast-clk 47 - fast-clk
48 Tegra114: 48 Tegra114:
49 - div-clk 49 - div-clk
50- resets: Must contain an entry for each entry in reset-names.
51 See ../reset/reset.txt for details.
52- reset-names: Must include the following entries:
53 - i2c
50 54
51Example: 55Example:
52 56
@@ -58,5 +62,7 @@ Example:
58 #size-cells = <0>; 62 #size-cells = <0>;
59 clocks = <&tegra_car 12>, <&tegra_car 124>; 63 clocks = <&tegra_car 12>, <&tegra_car 124>;
60 clock-names = "div-clk", "fast-clk"; 64 clock-names = "div-clk", "fast-clk";
65 resets = <&tegra_car 12>;
66 reset-names = "i2c";
61 status = "disabled"; 67 status = "disabled";
62 }; 68 };
diff --git a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
index 7d5a53dd77d1..0382b8bd69c6 100644
--- a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
+++ b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
@@ -15,6 +15,10 @@ Required properties:
15 devicetree/bindings/input/matrix-keymap.txt. 15 devicetree/bindings/input/matrix-keymap.txt.
16- clocks: Must contain one entry, for the module clock. 16- clocks: Must contain one entry, for the module clock.
17 See ../clocks/clock-bindings.txt for details. 17 See ../clocks/clock-bindings.txt for details.
18- resets: Must contain an entry for each entry in reset-names.
19 See ../reset/reset.txt for details.
20- reset-names: Must include the following entries:
21 - kbc
18 22
19Optional properties, in addition to those specified by the shared 23Optional properties, in addition to those specified by the shared
20matrix-keyboard bindings: 24matrix-keyboard bindings:
@@ -34,6 +38,8 @@ keyboard: keyboard {
34 reg = <0x7000e200 0x100>; 38 reg = <0x7000e200 0x100>;
35 interrupts = <0 85 0x04>; 39 interrupts = <0 85 0x04>;
36 clocks = <&tegra_car 36>; 40 clocks = <&tegra_car 36>;
41 resets = <&tegra_car 36>;
42 reset-names = "kbc";
37 nvidia,ghost-filter; 43 nvidia,ghost-filter;
38 nvidia,debounce-delay-ms = <640>; 44 nvidia,debounce-delay-ms = <640>;
39 nvidia,kbc-row-pins = <0 1 2>; /* pin 0, 1, 2 as rows */ 45 nvidia,kbc-row-pins = <0 1 2>; /* pin 0, 1, 2 as rows */
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
index f727902a9e8d..f357c16ea815 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -10,6 +10,10 @@ Required properties:
10- compatible : Should be "nvidia,<chip>-sdhci" 10- compatible : Should be "nvidia,<chip>-sdhci"
11- clocks : Must contain one entry, for the module clock. 11- clocks : Must contain one entry, for the module clock.
12 See ../clocks/clock-bindings.txt for details. 12 See ../clocks/clock-bindings.txt for details.
13- resets : Must contain an entry for each entry in reset-names.
14 See ../reset/reset.txt for details.
15- reset-names : Must include the following entries:
16 - sdhci
13 17
14Optional properties: 18Optional properties:
15- power-gpios : Specify GPIOs for power control 19- power-gpios : Specify GPIOs for power control
@@ -21,6 +25,8 @@ sdhci@c8000200 {
21 reg = <0xc8000200 0x200>; 25 reg = <0xc8000200 0x200>;
22 interrupts = <47>; 26 interrupts = <47>;
23 clocks = <&tegra_car 14>; 27 clocks = <&tegra_car 14>;
28 resets = <&tegra_car 14>;
29 reset-names = "sdhci";
24 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 30 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
25 wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 31 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
26 power-gpios = <&gpio 155 0>; /* gpio PT3 */ 32 power-gpios = <&gpio 155 0>; /* gpio PT3 */
diff --git a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
index a97fe575ca29..5ae601e7f51f 100644
--- a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
+++ b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
@@ -15,3 +15,7 @@ Required properties:
15 - fast-clk 15 - fast-clk
16 Tegra114: 16 Tegra114:
17 - div-clk 17 - div-clk
18- resets : Must contain an entry for each entry in reset-names.
19 See ../reset/reset.txt for details.
20- reset-names : Must include the following entries:
21 - i2c
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index 9e22da7393a3..24cee06915c9 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -47,9 +47,14 @@ Required properties:
47- clock-names: Must include the following entries: 47- clock-names: Must include the following entries:
48 - pex 48 - pex
49 - afi 49 - afi
50 - pcie_xclk
51 - pll_e 50 - pll_e
52 - cml (not required for Tegra20) 51 - cml (not required for Tegra20)
52- resets: Must contain an entry for each entry in reset-names.
53 See ../reset/reset.txt for details.
54- reset-names: Must include the following entries:
55 - pex
56 - afi
57 - pcie_x
53 58
54Root ports are defined as subnodes of the PCIe controller node. 59Root ports are defined as subnodes of the PCIe controller node.
55 60
@@ -91,9 +96,10 @@ SoC DTSI:
91 0x82000000 0 0xa0000000 0xa0000000 0 0x10000000 /* non-prefetchable memory */ 96 0x82000000 0 0xa0000000 0xa0000000 0 0x10000000 /* non-prefetchable memory */
92 0xc2000000 0 0xb0000000 0xb0000000 0 0x10000000>; /* prefetchable memory */ 97 0xc2000000 0 0xb0000000 0xb0000000 0 0x10000000>; /* prefetchable memory */
93 98
94 clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>, 99 clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 118>;
95 <&tegra_car 118>; 100 clock-names = "pex", "afi", "pll_e";
96 clock-names = "pex", "afi", "pcie_xclk", "pll_e"; 101 resets = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>;
102 reset-names = "pex", "afi", "pcie_x";
97 status = "disabled"; 103 status = "disabled";
98 104
99 pci@1,0 { 105 pci@1,0 {
diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
index f28128717dcc..c7ea9d4a988b 100644
--- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -9,6 +9,10 @@ Required properties:
9 the cells format. 9 the cells format.
10- clocks: Must contain one entry, for the module clock. 10- clocks: Must contain one entry, for the module clock.
11 See ../clocks/clock-bindings.txt for details. 11 See ../clocks/clock-bindings.txt for details.
12- resets: Must contain an entry for each entry in reset-names.
13 See ../reset/reset.txt for details.
14- reset-names: Must include the following entries:
15 - pwm
12 16
13Example: 17Example:
14 18
@@ -17,4 +21,6 @@ Example:
17 reg = <0x7000a000 0x100>; 21 reg = <0x7000a000 0x100>;
18 #pwm-cells = <2>; 22 #pwm-cells = <2>;
19 clocks = <&tegra_car 17>; 23 clocks = <&tegra_car 17>;
24 resets = <&tegra_car 17>;
25 reset-names = "pwm";
20 }; 26 };
diff --git a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
index 11eb6e71ddd6..74ebd4c2f99d 100644
--- a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
+++ b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
@@ -8,6 +8,10 @@ Required properties:
8 request selector for this UART controller. 8 request selector for this UART controller.
9- clocks: Must contain one entry, for the module clock. 9- clocks: Must contain one entry, for the module clock.
10 See ../clocks/clock-bindings.txt for details. 10 See ../clocks/clock-bindings.txt for details.
11- resets : Must contain an entry for each entry in reset-names.
12 See ../reset/reset.txt for details.
13- reset-names : Must include the following entries:
14 - serial
11 15
12Optional properties: 16Optional properties:
13- nvidia,enable-modem-interrupt: Enable modem interrupts. Should be enable 17- nvidia,enable-modem-interrupt: Enable modem interrupts. Should be enable
@@ -23,5 +27,7 @@ serial@70006000 {
23 nvidia,dma-request-selector = <&apbdma 8>; 27 nvidia,dma-request-selector = <&apbdma 8>;
24 nvidia,enable-modem-interrupt; 28 nvidia,enable-modem-interrupt;
25 clocks = <&tegra_car 6>; 29 clocks = <&tegra_car 6>;
30 resets = <&tegra_car 6>;
31 reset-names = "serial";
26 status = "disabled"; 32 status = "disabled";
27}; 33};
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
index 37f4ebf5b184..2b6817f6e40e 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
@@ -6,6 +6,10 @@ Required properties:
6- interrupts : Should contain AC97 interrupt 6- interrupts : Should contain AC97 interrupt
7- clocks : Must contain one entry, for the module clock. 7- clocks : Must contain one entry, for the module clock.
8 See ../clocks/clock-bindings.txt for details. 8 See ../clocks/clock-bindings.txt for details.
9- resets : Must contain an entry for each entry in reset-names.
10 See ../reset/reset.txt for details.
11- reset-names : Must include the following entries:
12 - ac97
9- nvidia,dma-request-selector : The Tegra DMA controller's phandle and 13- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
10 request selector for the AC97 controller 14 request selector for the AC97 controller
11- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number 15- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
@@ -23,4 +27,6 @@ ac97@70002000 {
23 nvidia,codec-reset-gpio = <&gpio 170 0>; 27 nvidia,codec-reset-gpio = <&gpio 170 0>;
24 nvidia,codec-sync-gpio = <&gpio 120 0>; 28 nvidia,codec-sync-gpio = <&gpio 120 0>;
25 clocks = <&tegra_car 3>; 29 clocks = <&tegra_car 3>;
30 resets = <&tegra_car 3>;
31 reset-names = "ac97";
26}; 32};
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
index ba0c9452916d..8b070aeca3db 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
@@ -6,6 +6,10 @@ Required properties:
6- interrupts : Should contain I2S interrupt 6- interrupts : Should contain I2S interrupt
7- clocks : Must contain one entry, for the module clock. 7- clocks : Must contain one entry, for the module clock.
8 See ../clocks/clock-bindings.txt for details. 8 See ../clocks/clock-bindings.txt for details.
9- resets : Must contain an entry for each entry in reset-names.
10 See ../reset/reset.txt for details.
11- reset-names : Must include the following entries:
12 - i2s
9- nvidia,dma-request-selector : The Tegra DMA controller's phandle and 13- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
10 request selector for this I2S controller 14 request selector for this I2S controller
11 15
@@ -17,4 +21,6 @@ i2s@70002800 {
17 interrupts = < 45 >; 21 interrupts = < 45 >;
18 nvidia,dma-request-selector = < &apbdma 2 >; 22 nvidia,dma-request-selector = < &apbdma 2 >;
19 clocks = <&tegra_car 11>; 23 clocks = <&tegra_car 11>;
24 resets = <&tegra_car 11>;
25 reset-names = "i2s";
20}; 26};
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
index 7299eeadd588..60d59a54ca07 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
@@ -15,6 +15,11 @@ Required properties:
15- clocks : Must contain an entry for each entry in clock-names. 15- clocks : Must contain an entry for each entry in clock-names.
16 See ../clocks/clock-bindings.txt for details. 16 See ../clocks/clock-bindings.txt for details.
17- clock-names : Must include the following entries: 17- clock-names : Must include the following entries:
18 - d_audio
19 - apbif
20- resets : Must contain an entry for each entry in reset-names.
21 See ../reset/reset.txt for details.
22- reset-names : Must include the following entries:
18 Tegra30 and later: 23 Tegra30 and later:
19 - d_audio 24 - d_audio
20 - apbif 25 - apbif
@@ -26,7 +31,7 @@ Required properties:
26 - dam0 31 - dam0
27 - dam1 32 - dam1
28 - dam2 33 - dam2
29 - spdif_in 34 - spdif
30 Tegra114 and later additionally require: 35 Tegra114 and later additionally require:
31 - amx 36 - amx
32 - adx 37 - adx
@@ -48,13 +53,15 @@ ahub@70080000 {
48 reg = <0x70080000 0x200 0x70080200 0x100>; 53 reg = <0x70080000 0x200 0x70080200 0x100>;
49 interrupts = < 0 103 0x04 >; 54 interrupts = < 0 103 0x04 >;
50 nvidia,dma-request-selector = <&apbdma 1>; 55 nvidia,dma-request-selector = <&apbdma 1>;
51 clocks = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>, 56 clocks = <&tegra_car 106>, <&tegra_car 107>;
57 clock-names = "d_audio", "apbif";
58 resets = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
52 <&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>, 59 <&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,
53 <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>, 60 <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>,
54 <&tegra_car 110>, <&tegra_car 162>; 61 <&tegra_car 110>, <&tegra_car 10>;
55 clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2", 62 reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
56 "i2s3", "i2s4", "dam0", "dam1", "dam2", 63 "i2s3", "i2s4", "dam0", "dam1", "dam2",
57 "spdif_in"; 64 "spdif";
58 ranges; 65 ranges;
59 #address-cells = <1>; 66 #address-cells = <1>;
60 #size-cells = <1>; 67 #size-cells = <1>;
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
index 7a3112bc135c..0c113ffe3814 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
@@ -5,6 +5,10 @@ Required properties:
5- reg : Should contain I2S registers location and length 5- reg : Should contain I2S registers location and length
6- clocks : Must contain one entry, for the module clock. 6- clocks : Must contain one entry, for the module clock.
7 See ../clocks/clock-bindings.txt for details. 7 See ../clocks/clock-bindings.txt for details.
8- resets : Must contain an entry for each entry in reset-names.
9 See ../reset/reset.txt for details.
10- reset-names : Must include the following entries:
11 - i2s
8- nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback) 12- nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback)
9 first, tx (capture) second. See nvidia,tegra30-ahub.txt for values. 13 first, tx (capture) second. See nvidia,tegra30-ahub.txt for values.
10 14
@@ -15,4 +19,6 @@ i2s@70080300 {
15 reg = <0x70080300 0x100>; 19 reg = <0x70080300 0x100>;
16 nvidia,ahub-cif-ids = <4 4>; 20 nvidia,ahub-cif-ids = <4 4>;
17 clocks = <&tegra_car 11>; 21 clocks = <&tegra_car 11>;
22 resets = <&tegra_car 11>;
23 reset-names = "i2s";
18}; 24};
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
index d4f2d534934b..fcd9f67999de 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
@@ -10,6 +10,10 @@ Required properties:
10 See ../clocks/clock-bindings.txt for details. 10 See ../clocks/clock-bindings.txt for details.
11- clock-names : Must include the following entries: 11- clock-names : Must include the following entries:
12 - spi 12 - spi
13- resets : Must contain an entry for each entry in reset-names.
14 See ../reset/reset.txt for details.
15- reset-names : Must include the following entries:
16 - spi
13 17
14Recommended properties: 18Recommended properties:
15- spi-max-frequency: Definition as per 19- spi-max-frequency: Definition as per
@@ -26,5 +30,7 @@ spi@7000d600 {
26 #size-cells = <0>; 30 #size-cells = <0>;
27 clocks = <&tegra_car 44>; 31 clocks = <&tegra_car 44>;
28 clock-names = "spi"; 32 clock-names = "spi";
33 resets = <&tegra_car 44>;
34 reset-names = "spi";
29 status = "disabled"; 35 status = "disabled";
30}; 36};
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
index 66e16c7f5939..e144f144717f 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
@@ -8,6 +8,10 @@ Required properties:
8 request selector for this SFLASH controller. 8 request selector for this SFLASH controller.
9- clocks : Must contain one entry, for the module clock. 9- clocks : Must contain one entry, for the module clock.
10 See ../clocks/clock-bindings.txt for details. 10 See ../clocks/clock-bindings.txt for details.
11- resets : Must contain an entry for each entry in reset-names.
12 See ../reset/reset.txt for details.
13- reset-names : Must include the following entries:
14 - spi
11 15
12Recommended properties: 16Recommended properties:
13- spi-max-frequency: Definition as per 17- spi-max-frequency: Definition as per
@@ -24,5 +28,7 @@ spi@7000c380 {
24 #address-cells = <1>; 28 #address-cells = <1>;
25 #size-cells = <0>; 29 #size-cells = <0>;
26 clocks = <&tegra_car 43>; 30 clocks = <&tegra_car 43>;
31 resets = <&tegra_car 43>;
32 reset-names = "spi";
27 status = "disabled"; 33 status = "disabled";
28}; 34};
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
index 0e6e94eb2b2a..9393e28f444b 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
@@ -8,6 +8,10 @@ Required properties:
8 request selector for this SLINK controller. 8 request selector for this SLINK controller.
9- clocks : Must contain one entry, for the module clock. 9- clocks : Must contain one entry, for the module clock.
10 See ../clocks/clock-bindings.txt for details. 10 See ../clocks/clock-bindings.txt for details.
11- resets : Must contain an entry for each entry in reset-names.
12 See ../reset/reset.txt for details.
13- reset-names : Must include the following entries:
14 - spi
11 15
12Recommended properties: 16Recommended properties:
13- spi-max-frequency: Definition as per 17- spi-max-frequency: Definition as per
@@ -24,5 +28,7 @@ spi@7000d600 {
24 #address-cells = <1>; 28 #address-cells = <1>;
25 #size-cells = <0>; 29 #size-cells = <0>;
26 clocks = <&tegra_car 44>; 30 clocks = <&tegra_car 44>;
31 resets = <&tegra_car 44>;
32 reset-names = "spi";
27 status = "disabled"; 33 status = "disabled";
28}; 34};
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index b98d0bdfa248..3dc9140e3dfb 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -10,6 +10,10 @@ Required properties :
10 - nvidia,phy : phandle of the PHY that the controller is connected to. 10 - nvidia,phy : phandle of the PHY that the controller is connected to.
11 - clocks : Must contain one entry, for the module clock. 11 - clocks : Must contain one entry, for the module clock.
12 See ../clocks/clock-bindings.txt for details. 12 See ../clocks/clock-bindings.txt for details.
13 - resets : Must contain an entry for each entry in reset-names.
14 See ../reset/reset.txt for details.
15 - reset-names : Must include the following entries:
16 - usb
13 17
14Optional properties: 18Optional properties:
15 - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20 19 - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20