diff options
author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2013-06-11 02:38:50 -0400 |
---|---|---|
committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2013-07-02 09:01:45 -0400 |
commit | 0c1dcfd53b1066c411d3885cf8156abf59694360 (patch) | |
tree | bb13bb0c0a6163798cced0045c71d4b02a3a3d11 /Documentation/devicetree | |
parent | 07bd1172902e782f288e4d44b1fde7dec0f08b6f (diff) |
clocksource: Add Marvell Orion SoC timer
This patch add a DT enabled driver for timers found on Marvell Orion SoCs
(Kirkwood, Dove, Orion5x, and Discovery Innovation). It installs a free-
running clocksource on timer0 and a clockevent source on timer1.
Corresponding device tree documentation is also added.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/timer/marvell,orion-timer.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt b/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt new file mode 100644 index 000000000000..62bb8260cf6a --- /dev/null +++ b/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt | |||
@@ -0,0 +1,17 @@ | |||
1 | Marvell Orion SoC timer | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: shall be "marvell,orion-timer" | ||
5 | - reg: base address of the timer register starting with TIMERS CONTROL register | ||
6 | - interrupt-parent: phandle of the bridge interrupt controller | ||
7 | - interrupts: should contain the interrupts for Timer0 and Timer1 | ||
8 | - clocks: phandle of timer reference clock (tclk) | ||
9 | |||
10 | Example: | ||
11 | timer: timer { | ||
12 | compatible = "marvell,orion-timer"; | ||
13 | reg = <0x20300 0x20>; | ||
14 | interrupt-parent = <&bridge_intc>; | ||
15 | interrupts = <1>, <2>; | ||
16 | clocks = <&core_clk 0>; | ||
17 | }; | ||