diff options
author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2012-09-13 11:41:43 -0400 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2012-09-22 10:50:14 -0400 |
commit | 7e8d941567c99a03390154a7bb116d1b03db82b3 (patch) | |
tree | 069e6d14c5af258c02cef3658d0be38bc8de2f6d /Documentation/devicetree/bindings | |
parent | 5b40baee4a39d96d4d6a48a2b2383982912c429b (diff) |
pinctrl: mvebu: pinctrl driver core
This patch adds a pinctrl driver core for Marvell SoCs plus DT
binding documentation. This core driver will be used by SoC family
specific drivers, i.e. Armada XP, Armada 370, Dove, Kirkwood, aso.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Conflicts:
arch/arm/Kconfig
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r-- | Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt new file mode 100644 index 000000000000..0a26c3aa4e6d --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt | |||
@@ -0,0 +1,46 @@ | |||
1 | * Marvell SoC pinctrl core driver for mpp | ||
2 | |||
3 | The pinctrl driver enables Marvell SoCs to configure the multi-purpose pins | ||
4 | (mpp) to a specific function. For each SoC family there is a SoC specific | ||
5 | driver using this core driver. | ||
6 | |||
7 | Please refer to pinctrl-bindings.txt in this directory for details of the | ||
8 | common pinctrl bindings used by client devices, including the meaning of the | ||
9 | phrase "pin configuration node". | ||
10 | |||
11 | A Marvell SoC pin configuration node is a node of a group of pins which can | ||
12 | be used for a specific device or function. Each node requires one or more | ||
13 | mpp pins or group of pins and a mpp function common to all pins. | ||
14 | |||
15 | Required properties for pinctrl driver: | ||
16 | - compatible: "marvell,<soc>-pinctrl" | ||
17 | Please refer to each marvell,<soc>-pinctrl.txt binding doc for supported SoCs. | ||
18 | |||
19 | Required properties for pin configuration node: | ||
20 | - marvell,pins: string array of mpp pins or group of pins to be muxed. | ||
21 | - marvell,function: string representing a function to mux to for all | ||
22 | marvell,pins given in this pin configuration node. The function has to be | ||
23 | common for all marvell,pins. Please refer to marvell,<soc>-pinctrl.txt for | ||
24 | valid pin/pin group names and available function names for each SoC. | ||
25 | |||
26 | Examples: | ||
27 | |||
28 | uart1: serial@12100 { | ||
29 | compatible = "ns16550a"; | ||
30 | reg = <0x12100 0x100>; | ||
31 | reg-shift = <2>; | ||
32 | interrupts = <7>; | ||
33 | |||
34 | pinctrl-0 = <&pmx_uart1_sw>; | ||
35 | pinctrl-names = "default"; | ||
36 | }; | ||
37 | |||
38 | pinctrl: pinctrl@d0200 { | ||
39 | compatible = "marvell,dove-pinctrl"; | ||
40 | reg = <0xd0200 0x20>; | ||
41 | |||
42 | pmx_uart1_sw: pmx-uart1-sw { | ||
43 | marvell,pins = "mpp_uart1"; | ||
44 | marvell,function = "uart1"; | ||
45 | }; | ||
46 | }; | ||