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authorHeiko Stübner <heiko@sntech.de>2014-06-16 09:25:17 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-07-10 18:27:37 -0400
commit7d78cbefaa465bbf36e2b4b90d3c196a00f54008 (patch)
tree9bce39e9e8c77f596280a1d59784d82c958e42eb /Documentation/devicetree/bindings/serial
parentd8782c7452b4a54cc8830074e8cd967e17559880 (diff)
serial: 8250_dw: add ability to handle the peripheral clock
First try to find the named clock variants then fall back to the already existing handling of a nameless declared baudclk. This also adds the missing documentation for this already existing variant. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
-rw-r--r--Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt31
1 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
index f13f1c5be91c..095ac7172ffe 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
@@ -4,7 +4,15 @@ Required properties:
4- compatible : "snps,dw-apb-uart" 4- compatible : "snps,dw-apb-uart"
5- reg : offset and length of the register set for the device. 5- reg : offset and length of the register set for the device.
6- interrupts : should contain uart interrupt. 6- interrupts : should contain uart interrupt.
7
8Clock handling:
9The clock rate of the input clock needs to be supplied by one of
7- clock-frequency : the input clock frequency for the UART. 10- clock-frequency : the input clock frequency for the UART.
11- clocks : phandle to the input clock
12
13The supplying peripheral clock can also be handled, needing a second property
14- clock-names: tuple listing input clock names.
15 Required elements: "baudclk", "apb_pclk"
8 16
9Optional properties: 17Optional properties:
10- reg-shift : quantity to shift the register offsets by. If this property is 18- reg-shift : quantity to shift the register offsets by. If this property is
@@ -23,3 +31,26 @@ Example:
23 reg-shift = <2>; 31 reg-shift = <2>;
24 reg-io-width = <4>; 32 reg-io-width = <4>;
25 }; 33 };
34
35Example with one clock:
36
37 uart@80230000 {
38 compatible = "snps,dw-apb-uart";
39 reg = <0x80230000 0x100>;
40 clocks = <&baudclk>;
41 interrupts = <10>;
42 reg-shift = <2>;
43 reg-io-width = <4>;
44 };
45
46Example with two clocks:
47
48 uart@80230000 {
49 compatible = "snps,dw-apb-uart";
50 reg = <0x80230000 0x100>;
51 clocks = <&baudclk>, <&apb_pclk>;
52 clock-names = "baudclk", "apb_pclk";
53 interrupts = <10>;
54 reg-shift = <2>;
55 reg-io-width = <4>;
56 };