diff options
author | Jingchang Lu <jingchang.lu@freescale.com> | 2014-07-14 05:41:10 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-07-17 21:15:38 -0400 |
commit | 876496b8cd01b02f7eb561c27aeaf908e4c3f86e (patch) | |
tree | de885dc04d017f646b2094973088f35db1cb600f /Documentation/devicetree/bindings/serial | |
parent | 730c4e782c039caf40b467c35f595c005e94220c (diff) |
dt-binding: fsl-lpuart: use exact SoC revision to document binding
use exact SoC revision instead of wildcard describing
to make the binding more clearer.
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
-rw-r--r-- | Documentation/devicetree/bindings/serial/fsl-lpuart.txt | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt index a1d1205d8185..c95005efbcb8 100644 --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt | |||
@@ -1,7 +1,11 @@ | |||
1 | * Freescale low power universal asynchronous receiver/transmitter (lpuart) | 1 | * Freescale low power universal asynchronous receiver/transmitter (lpuart) |
2 | 2 | ||
3 | Required properties: | 3 | Required properties: |
4 | - compatible : Should be "fsl,<soc>-lpuart" | 4 | - compatible : |
5 | - "fsl,vf610-lpuart" for lpuart compatible with the one integrated | ||
6 | on Vybrid vf610 SoC with 8-bit register organization | ||
7 | - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated | ||
8 | on LS1021A SoC with 32-bit big-endian register organization | ||
5 | - reg : Address and length of the register set for the device | 9 | - reg : Address and length of the register set for the device |
6 | - interrupts : Should contain uart interrupt | 10 | - interrupts : Should contain uart interrupt |
7 | - clocks : phandle + clock specifier pairs, one for each entry in clock-names | 11 | - clocks : phandle + clock specifier pairs, one for each entry in clock-names |