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authorPrabhakar Kushwaha <prabhakar@freescale.com>2012-08-15 11:13:52 -0400
committerKumar Gala <galak@kernel.crashing.org>2012-09-12 15:57:10 -0400
commitf4dfef75adb12fec7693d0c469e2de6c7d45e975 (patch)
tree846c43404e04f1d1e6affc5a59c84837a2edd0c6 /Documentation/devicetree/bindings/powerpc
parent8778721912adaf1076f427867384130480c86ca8 (diff)
powerpc: Update Integrated Flash controller device tree bindings
Freescale's Integrated Flash controller (IFC) may have one or two interrupts. In case of single interrupt line, it will cover all IFC interrupts. Update this information in IFC device tree bindings Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation/devicetree/bindings/powerpc')
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/ifc.txt9
1 files changed, 6 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt b/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt
index 939a26d541f6..d5e370450ac0 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/ifc.txt
@@ -12,9 +12,12 @@ Properties:
12- #size-cells : Either one or two, depending on how large each chipselect 12- #size-cells : Either one or two, depending on how large each chipselect
13 can be. 13 can be.
14- reg : Offset and length of the register set for the device 14- reg : Offset and length of the register set for the device
15- interrupts : IFC has two interrupts. The first one is the "common" 15- interrupts: IFC may have one or two interrupts. If two interrupt
16 interrupt(CM_EVTER_STAT), and second is the NAND interrupt 16 specifiers are present, the first is the "common"
17 (NAND_EVTER_STAT). 17 interrupt (CM_EVTER_STAT), and the second is the NAND
18 interrupt (NAND_EVTER_STAT). If there is only one,
19 that interrupt reports both types of event.
20
18 21
19- ranges : Each range corresponds to a single chipselect, and covers 22- ranges : Each range corresponds to a single chipselect, and covers
20 the entire access window as configured. 23 the entire access window as configured.