diff options
| author | Sean Cross <xobs@kosagi.com> | 2013-09-25 23:24:47 -0400 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-09-27 15:17:08 -0400 |
| commit | bb38919ec56e0758c3ae56dfc091dcde1391353e (patch) | |
| tree | 2bfadf7af2bd93e9d34b6a69bdae085bac7b3df9 /Documentation/devicetree/bindings/pci/designware-pcie.txt | |
| parent | 8d6a35fb13406f87d926fffeee0d70360ce3077d (diff) | |
PCI: imx6: Add support for i.MX6 PCIe controller
Add support for the PCIe port present on the i.MX6 family of controllers.
These use the Synopsis Designware core tied to their own PHY.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/designware-pcie.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/designware-pcie.txt | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt index eabcb4b5db6e..dd8d920bcbd6 100644 --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: should contain "snps,dw-pcie" to identify the | 4 | - compatible: should contain "snps,dw-pcie" to identify the |
| 5 | core, plus an identifier for the specific instance, such | 5 | core, plus an identifier for the specific instance, such |
| 6 | as "samsung,exynos5440-pcie". | 6 | as "samsung,exynos5440-pcie" or "fsl,imx6q-pcie". |
| 7 | - reg: base addresses and lengths of the pcie controller, | 7 | - reg: base addresses and lengths of the pcie controller, |
| 8 | the phy controller, additional register for the phy controller. | 8 | the phy controller, additional register for the phy controller. |
| 9 | - interrupts: interrupt values for level interrupt, | 9 | - interrupts: interrupt values for level interrupt, |
| @@ -21,6 +21,11 @@ Required properties: | |||
| 21 | - num-lanes: number of lanes to use | 21 | - num-lanes: number of lanes to use |
| 22 | - reset-gpio: gpio pin number of power good signal | 22 | - reset-gpio: gpio pin number of power good signal |
| 23 | 23 | ||
| 24 | Optional properties for fsl,imx6q-pcie | ||
| 25 | - power-on-gpio: gpio pin number of power-enable signal | ||
| 26 | - wake-up-gpio: gpio pin number of incoming wakeup signal | ||
| 27 | - disable-gpio: gpio pin number of outgoing rfkill/endpoint disable signal | ||
| 28 | |||
| 24 | Example: | 29 | Example: |
| 25 | 30 | ||
| 26 | SoC specific DT Entry: | 31 | SoC specific DT Entry: |