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authorMugunthan V N <mugunthanvnm@ti.com>2012-07-30 06:17:14 -0400
committerDavid S. Miller <davem@davemloft.net>2012-08-03 23:40:12 -0400
commit2eb32b0a6f9d73fafc6b2c00ac0b705de13ae143 (patch)
tree84af7ded947951dc4149b6e733e7ec1db0605fbd /Documentation/devicetree/bindings/net/cpsw.txt
parentf07454fe2d6c233366a79aa13a638f69755745a5 (diff)
drivers: net: ethernet: cpsw: Add device tree support to CPSW
This patch adds device tree support for cpsw driver Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1TI SoC Ethernet Switch Controller Device Tree Bindings
2------------------------------------------------------
3
4Required properties:
5- compatible : Should be "ti,cpsw"
6- reg : physical base address and size of the cpsw
7 registers map
8- interrupts : property with a value describing the interrupt
9 number
10- interrupt-parent : The parent interrupt controller
11- cpdma_channels : Specifies number of channels in CPDMA
12- host_port_no : Specifies host port shift
13- cpdma_reg_ofs : Specifies CPDMA submodule register offset
14- ale_reg_ofs : Specifies ALE submodule register offset
15- ale_entries : Specifies No of entries ALE can hold
16- host_port_reg_ofs : Specifies host port register offset
17- hw_stats_reg_ofs : Specifies hardware statistics register offset
18- bd_ram_ofs : Specifies internal desciptor RAM offset
19- bd_ram_size : Specifies internal descriptor RAM size
20- rx_descs : Specifies number of Rx descriptors
21- mac_control : Specifies Default MAC control register content
22 for the specific platform
23- slaves : Specifies number for slaves
24- slave_reg_ofs : Specifies slave register offset
25- sliver_reg_ofs : Specifies slave sliver register offset
26- phy_id : Specifies slave phy id
27- mac-address : Specifies slave MAC address
28
29Optional properties:
30- ti,hwmods : Must be "cpgmac0"
31- no_bd_ram : Must be 0 or 1
32
33Note: "ti,hwmods" field is used to fetch the base address and irq
34resources from TI, omap hwmod data base during device registration.
35Future plan is to migrate hwmod data base contents into device tree
36blob so that, all the required data will be used from device tree dts
37file.
38
39Examples:
40
41 mac: ethernet@4A100000 {
42 compatible = "ti,cpsw";
43 reg = <0x4A100000 0x1000>;
44 interrupts = <55 0x4>;
45 interrupt-parent = <&intc>;
46 cpdma_channels = 8;
47 host_port_no = 0;
48 cpdma_reg_ofs = 0x800;
49 ale_reg_ofs = 0xd00;
50 ale_entries = 1024;
51 host_port_reg_ofs = 0x108;
52 hw_stats_reg_ofs = 0x900;
53 bd_ram_ofs = 0x2000;
54 bd_ram_size = 0x2000;
55 no_bd_ram = 0;
56 rx_descs = 64;
57 mac_control = 0x20;
58 slaves = 2;
59 slave@0 {
60 slave_reg_ofs = 0x208;
61 sliver_reg_ofs = 0xd80;
62 phy_id = "davinci_mdio-0:00"
63 mac-address = [00 04 9F 01 1B B8];
64 };
65 slave@1 {
66 slave_reg_ofs = 0x208;
67 sliver_reg_ofs = 0xd80;
68 phy_id = "davinci_mdio-0:01"
69 mac-address = [00 04 9F 01 1B B9];
70 };
71 };
72
73(or)
74
75 mac: ethernet@4A100000 {
76 compatible = "ti,cpsw";
77 ti,hwmods = "cpgmac0";
78 cpdma_channels = 8;
79 host_port_no = 0;
80 cpdma_reg_ofs = 0x800;
81 ale_reg_ofs = 0xd00;
82 ale_entries = 1024;
83 host_port_reg_ofs = 0x108;
84 hw_stats_reg_ofs = 0x900;
85 bd_ram_ofs = 0x2000;
86 bd_ram_size = 0x2000;
87 no_bd_ram = 0;
88 rx_descs = 64;
89 mac_control = 0x20;
90 slaves = 2;
91 slave@0 {
92 slave_reg_ofs = 0x208;
93 sliver_reg_ofs = 0xd80;
94 phy_id = "davinci_mdio-0:00"
95 mac-address = [00 04 9F 01 1B B8];
96 };
97 slave@1 {
98 slave_reg_ofs = 0x208;
99 sliver_reg_ofs = 0xd80;
100 phy_id = "davinci_mdio-0:01"
101 mac-address = [00 04 9F 01 1B B9];
102 };
103
104 };