aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/mmc
diff options
context:
space:
mode:
authorGrant Likely <grant.likely@secretlab.ca>2011-03-12 03:25:53 -0500
committerGrant Likely <grant.likely@secretlab.ca>2011-03-12 03:25:53 -0500
commit9c3c8afccb6a163fd2be739f511e863eab668702 (patch)
treee587a5377ada98fed8cfa6c8ee63125361f2818a /Documentation/devicetree/bindings/mmc
parent290293eda2c6dd368476d71433bdef07c39a6829 (diff)
parenta5abba989deceb731047425812d268daf7536575 (diff)
Merge commit 'v2.6.38-rc8' into spi/next
Conflicts: drivers/spi/pxa2xx_spi_pci.c
Diffstat (limited to 'Documentation/devicetree/bindings/mmc')
-rw-r--r--Documentation/devicetree/bindings/mmc/fsl-esdhc.txt29
-rw-r--r--Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt30
2 files changed, 59 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
new file mode 100644
index 000000000000..64bcb8be973c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -0,0 +1,29 @@
1* Freescale Enhanced Secure Digital Host Controller (eSDHC)
2
3The Enhanced Secure Digital Host Controller provides an interface
4for MMC, SD, and SDIO types of memory cards.
5
6Required properties:
7 - compatible : should be
8 "fsl,<chip>-esdhc", "fsl,esdhc"
9 - reg : should contain eSDHC registers location and length.
10 - interrupts : should contain eSDHC interrupt.
11 - interrupt-parent : interrupt source phandle.
12 - clock-frequency : specifies eSDHC base clock frequency.
13 - sdhci,wp-inverted : (optional) specifies that eSDHC controller
14 reports inverted write-protect state;
15 - sdhci,1-bit-only : (optional) specifies that a controller can
16 only handle 1-bit data transfers.
17 - sdhci,auto-cmd12: (optional) specifies that a controller can
18 only handle auto CMD12.
19
20Example:
21
22sdhci@2e000 {
23 compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
24 reg = <0x2e000 0x1000>;
25 interrupts = <42 0x8>;
26 interrupt-parent = <&ipic>;
27 /* Filled in by U-Boot */
28 clock-frequency = <0>;
29};
diff --git a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt
new file mode 100644
index 000000000000..89a0084df2f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt
@@ -0,0 +1,30 @@
1MMC/SD/SDIO slot directly connected to a SPI bus
2
3Required properties:
4- compatible : should be "mmc-spi-slot".
5- reg : should specify SPI address (chip-select number).
6- spi-max-frequency : maximum frequency for this device (Hz).
7- voltage-ranges : two cells are required, first cell specifies minimum
8 slot voltage (mV), second cell specifies maximum slot voltage (mV).
9 Several ranges could be specified.
10
11Optional properties:
12- gpios : may specify GPIOs in this order: Card-Detect GPIO,
13 Write-Protect GPIO.
14- interrupts : the interrupt of a card detect interrupt.
15- interrupt-parent : the phandle for the interrupt controller that
16 services interrupts for this device.
17
18Example:
19
20 mmc-slot@0 {
21 compatible = "fsl,mpc8323rdb-mmc-slot",
22 "mmc-spi-slot";
23 reg = <0>;
24 gpios = <&qe_pio_d 14 1
25 &qe_pio_d 15 0>;
26 voltage-ranges = <3300 3300>;
27 spi-max-frequency = <50000000>;
28 interrupts = <42>;
29 interrupt-parent = <&PIC>;
30 };