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authorPaul Walmsley <paul@pwsan.com>2015-01-30 17:11:04 -0500
committerRob Herring <robh@kernel.org>2015-02-03 21:37:31 -0500
commit193c9d23a0f0b8ae0c2aeb517c953ba8aee4ceb9 (patch)
tree9508950b34a6f7723da6f9a3488897de99306583 /Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
parent2d4c0aef0ff4d4374590d6c7b259a259bb2cb21b (diff)
Documentation: DT bindings: add more Tegra chip compatible strings
Align compatible strings for several IP blocks present on Tegra chips with the latest doctrine from the DT maintainers: http://marc.info/?l=devicetree&m=142255654213019&w=2 The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 DT binding text files have been updated for the following IP blocks: - PCIe - SOR - SoC timers - AHB "gizmo" - APB_MISC - pinmux control - UART - PWM - I2C - SPI - RTC - PMC - eFuse - AHCI - HDA - XUSB_PADCTRL - SDHCI - SOC_THERM - AHUB - I2S - EHCI - USB PHY N.B. The nvidia,tegra20-timer compatible string is removed from the nvidia,tegra30-timer.txt documentation file because it's already mentioned in the nvidia,tegra20-timer.txt documentation file. This second version takes into account the following requests from Rob Herring <robherring2@gmail.com>: - Per-IP block patches have been combined into a single patch - Explicit documentation about which compatible strings are actually matched by the driver has been removed. In its place is implicit documentation that loosely follows Rob's prescribed format: "Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where <chip> is tegra30, tegra132, ..." [...] "You should attempt to document known values of <chip> if you use it" Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Dylan Reid <dgreid@chromium.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Jingchang Lu <jingchang.lu@freescale.com> Cc: John Crispin <blogic@openwrt.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mikko Perttunen <mperttunen@nvidia.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Takashi Iwai <tiwai@suse.de> Cc: Tejun Heo <tj@kernel.org> Cc: "Terje Bergström" <tbergstrom@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Zhang Rui <rui.zhang@intel.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-i2c@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-pwm@vger.kernel.org Cc: linux-tegra@vger.kernel.org Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt')
-rw-r--r--Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt9
1 files changed, 4 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
index b97b8bef1fe5..47b205cc9cc7 100644
--- a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
@@ -1,11 +1,10 @@
1NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block 1NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block
2 2
3Required properties: 3Required properties:
4- compatible : should be: 4- compatible : For Tegra20, must be "nvidia,tegra20-apbmisc". For Tegra30,
5 "nvidia,tegra20-apbmisc" 5 must be "nvidia,tegra30-apbmisc". Otherwise, must contain
6 "nvidia,tegra30-apbmisc" 6 "nvidia,<chip>-apbmisc", plus one of the above, where <chip> is tegra114,
7 "nvidia,tegra114-apbmisc" 7 tegra124, tegra132.
8 "nvidia,tegra124-apbmisc"
9- reg: Should contain 2 entries: the first entry gives the physical address 8- reg: Should contain 2 entries: the first entry gives the physical address
10 and length of the registers which contain revision and debug features. 9 and length of the registers which contain revision and debug features.
11 The second entry gives the physical address and length of the 10 The second entry gives the physical address and length of the