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authorBoris Brezillon <boris.brezillon@free-electrons.com>2014-10-06 09:48:44 -0400
committerLee Jones <lee.jones@linaro.org>2014-11-25 11:18:44 -0500
commit590b7795b3dc293a36136a4321ba59da60e5853c (patch)
tree5c205c8098af75678031d634c5b896ee0ddd688d /Documentation/devicetree/bindings/mfd
parent2c86e9fb7263dbca2c21a086090d32ba90129f7b (diff)
mfd: Add documentation for atmel-hlcdc DT bindings
The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) exposes 2 subdevices: - a display controller (controlled by a DRM driver) - a PWM chip This patch adds documentation for atmel-hlcdc DT bindings. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Anthony Harivel <anthony.harivel@emtrion.de> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/mfd')
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diff --git a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
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1Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver
2
3Required properties:
4 - compatible: value should be one of the following:
5 "atmel,sama5d3-hlcdc"
6 - reg: base address and size of the HLCDC device registers.
7 - clock-names: the name of the 3 clocks requested by the HLCDC device.
8 Should contain "periph_clk", "sys_clk" and "slow_clk".
9 - clocks: should contain the 3 clocks requested by the HLCDC device.
10 - interrupts: should contain the description of the HLCDC interrupt line
11
12The HLCDC IP exposes two subdevices:
13 - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt
14 - a Display Controller: see ../drm/atmel-hlcdc-dc.txt
15
16Example:
17
18 hlcdc: hlcdc@f0030000 {
19 compatible = "atmel,sama5d3-hlcdc";
20 reg = <0xf0030000 0x2000>;
21 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
22 clock-names = "periph_clk","sys_clk", "slow_clk";
23 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
24 status = "disabled";
25
26 hlcdc-display-controller {
27 compatible = "atmel,hlcdc-display-controller";
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 port@0 {
34 #address-cells = <1>;
35 #size-cells = <0>;
36 reg = <0>;
37
38 hlcdc_panel_output: endpoint@0 {
39 reg = <0>;
40 remote-endpoint = <&panel_input>;
41 };
42 };
43 };
44
45 hlcdc_pwm: hlcdc-pwm {
46 compatible = "atmel,hlcdc-pwm";
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_lcd_pwm>;
49 #pwm-cells = <3>;
50 };
51 };