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authorPrabhakar Kushwaha <prabhakar@freescale.com>2014-01-17 00:45:16 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-02-18 15:20:45 -0500
commitd2ae2e20fbdde5a65f3a5a153044ab1e5c53f7cc (patch)
treef707fc47d57b18f5eec3a17b8b57f8c12b614f48 /Documentation/devicetree/bindings/memory-controllers
parent3503958cb0a5f183ddbdafe0f352607920cd8668 (diff)
driver/memory:Move Freescale IFC driver to a common driver
Freescale IFC controller has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the driver to driver/memory and fix the header file includes. Also remove module_platform_driver() and instead call platform_driver_register() from subsys_initcall() to make sure this module has been loaded before MTD partition parsing starts. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers')
-rw-r--r--Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt79
1 files changed, 79 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
new file mode 100644
index 000000000000..d5e370450ac0
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+++ b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
@@ -0,0 +1,79 @@
1Integrated Flash Controller
2
3Properties:
4- name : Should be ifc
5- compatible : should contain "fsl,ifc". The version of the integrated
6 flash controller can be found in the IFC_REV register at
7 offset zero.
8
9- #address-cells : Should be either two or three. The first cell is the
10 chipselect number, and the remaining cells are the
11 offset into the chipselect.
12- #size-cells : Either one or two, depending on how large each chipselect
13 can be.
14- reg : Offset and length of the register set for the device
15- interrupts: IFC may have one or two interrupts. If two interrupt
16 specifiers are present, the first is the "common"
17 interrupt (CM_EVTER_STAT), and the second is the NAND
18 interrupt (NAND_EVTER_STAT). If there is only one,
19 that interrupt reports both types of event.
20
21
22- ranges : Each range corresponds to a single chipselect, and covers
23 the entire access window as configured.
24
25Child device nodes describe the devices connected to IFC such as NOR (e.g.
26cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices
27like FPGAs, CPLDs, etc.
28
29Example:
30
31 ifc@ffe1e000 {
32 compatible = "fsl,ifc", "simple-bus";
33 #address-cells = <2>;
34 #size-cells = <1>;
35 reg = <0x0 0xffe1e000 0 0x2000>;
36 interrupts = <16 2 19 2>;
37
38 /* NOR, NAND Flashes and CPLD on board */
39 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
40 0x1 0x0 0x0 0xffa00000 0x00010000
41 0x3 0x0 0x0 0xffb00000 0x00020000>;
42
43 flash@0,0 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 compatible = "cfi-flash";
47 reg = <0x0 0x0 0x2000000>;
48 bank-width = <2>;
49 device-width = <1>;
50
51 partition@0 {
52 /* 32MB for user data */
53 reg = <0x0 0x02000000>;
54 label = "NOR Data";
55 };
56 };
57
58 flash@1,0 {
59 #address-cells = <1>;
60 #size-cells = <1>;
61 compatible = "fsl,ifc-nand";
62 reg = <0x1 0x0 0x10000>;
63
64 partition@0 {
65 /* This location must not be altered */
66 /* 1MB for u-boot Bootloader Image */
67 reg = <0x0 0x00100000>;
68 label = "NAND U-Boot Image";
69 read-only;
70 };
71 };
72
73 cpld@3,0 {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 compatible = "fsl,p1010rdb-cpld";
77 reg = <0x3 0x0 0x000001f>;
78 };
79 };