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authorGrant Likely <grant.likely@secretlab.ca>2011-01-26 12:10:40 -0500
committerGrant Likely <grant.likely@secretlab.ca>2011-01-31 02:09:01 -0500
commitd524dac9279b6a41ffdf7ff7958c577f2e387db6 (patch)
tree294166d18a1c89c4cebb2571ea7b124876fb01ef /Documentation/devicetree/bindings/i2c
parent1bae4ce27c9c90344f23c65ea6966c50ffeae2f5 (diff)
dt: Move device tree documentation out of powerpc directory
The device tree is used by more than just PowerPC. Make the documentation directory available to all. v2: reorganized files while moving to create arch and driver specific directories. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'Documentation/devicetree/bindings/i2c')
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diff --git a/Documentation/devicetree/bindings/i2c/fsl-i2c.txt b/Documentation/devicetree/bindings/i2c/fsl-i2c.txt
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1* I2C
2
3Required properties :
4
5 - reg : Offset and length of the register set for the device
6 - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
7 compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
8 mpc5200 or mpc5200b. For the mpc5121, an additional node
9 "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
10
11Recommended properties :
12
13 - interrupts : <a b> where a is the interrupt number and b is a
14 field that represents an encoding of the sense and level
15 information for the interrupt. This should be encoded based on
16 the information in section 2) depending on the type of interrupt
17 controller you have.
18 - interrupt-parent : the phandle for the interrupt controller that
19 services interrupts for this device.
20 - fsl,preserve-clocking : boolean; if defined, the clock settings
21 from the bootloader are preserved (not touched).
22 - clock-frequency : desired I2C bus clock frequency in Hz.
23 - fsl,timeout : I2C bus timeout in microseconds.
24
25Examples :
26
27 /* MPC5121 based board */
28 i2c@1740 {
29 #address-cells = <1>;
30 #size-cells = <0>;
31 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
32 reg = <0x1740 0x20>;
33 interrupts = <11 0x8>;
34 interrupt-parent = <&ipic>;
35 clock-frequency = <100000>;
36 };
37
38 i2ccontrol@1760 {
39 compatible = "fsl,mpc5121-i2c-ctrl";
40 reg = <0x1760 0x8>;
41 };
42
43 /* MPC5200B based board */
44 i2c@3d00 {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
48 reg = <0x3d00 0x40>;
49 interrupts = <2 15 0>;
50 interrupt-parent = <&mpc5200_pic>;
51 fsl,preserve-clocking;
52 };
53
54 /* MPC8544 base board */
55 i2c@3100 {
56 #address-cells = <1>;
57 #size-cells = <0>;
58 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
59 reg = <0x3100 0x100>;
60 interrupts = <43 2>;
61 interrupt-parent = <&mpic>;
62 clock-frequency = <400000>;
63 fsl,timeout = <10000>;
64 };