diff options
author | Roland Stigge <stigge@antcom.de> | 2012-05-18 04:19:52 -0400 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2012-05-18 18:48:36 -0400 |
commit | e92935e13a052df7e6bc274e00fc91b80531f1e4 (patch) | |
tree | b04f80aa90bab2d71f2299b00f5cccc3e7ee9a7a /Documentation/devicetree/bindings/gpio | |
parent | 3d0f7cf0f3633f92ddeb767eb59cab73963d4dee (diff) |
gpio/lpc32xx: Add device tree support
This patch adds device tree support for gpio-lpc32xx.c.
To register the various GPIO banks as (struct) gpio_chips via the same DT
gpio-controller, we utilize the adjusted of_xlate API to manipulate the
actually used struct gpio_chip.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'Documentation/devicetree/bindings/gpio')
-rw-r--r-- | Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt b/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt new file mode 100644 index 000000000000..49819367a011 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt | |||
@@ -0,0 +1,43 @@ | |||
1 | NXP LPC32xx SoC GPIO controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: must be "nxp,lpc3220-gpio" | ||
5 | - reg: Physical base address and length of the controller's registers. | ||
6 | - gpio-controller: Marks the device node as a GPIO controller. | ||
7 | - #gpio-cells: Should be 3: | ||
8 | 1) bank: | ||
9 | 0: GPIO P0 | ||
10 | 1: GPIO P1 | ||
11 | 2: GPIO P2 | ||
12 | 3: GPIO P3 | ||
13 | 4: GPI P3 | ||
14 | 5: GPO P3 | ||
15 | 2) pin number | ||
16 | 3) optional parameters: | ||
17 | - bit 0 specifies polarity (0 for normal, 1 for inverted) | ||
18 | - reg: Index of the GPIO group | ||
19 | |||
20 | Example: | ||
21 | |||
22 | gpio: gpio@40028000 { | ||
23 | compatible = "nxp,lpc3220-gpio"; | ||
24 | reg = <0x40028000 0x1000>; | ||
25 | gpio-controller; | ||
26 | #gpio-cells = <3>; /* bank, pin, flags */ | ||
27 | }; | ||
28 | |||
29 | leds { | ||
30 | compatible = "gpio-leds"; | ||
31 | |||
32 | led0 { | ||
33 | gpios = <&gpio 5 1 1>; /* GPO_P3 1, active low */ | ||
34 | linux,default-trigger = "heartbeat"; | ||
35 | default-state = "off"; | ||
36 | }; | ||
37 | |||
38 | led1 { | ||
39 | gpios = <&gpio 5 14 1>; /* GPO_P3 14, active low */ | ||
40 | linux,default-trigger = "timer"; | ||
41 | default-state = "off"; | ||
42 | }; | ||
43 | }; | ||